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Commit Graph

43 Commits

Author SHA1 Message Date
benpicco
0edfd13df0
Merge pull request #13310 from benpicco/sam0-exti-common
cpu/sam0_common: use generic exti_config
2020-02-26 08:40:49 +01:00
Juergen Fitschen
43ff72ad56 cpu/sam0*: Switch EIC clock to slow speed on STANDBY mode 2020-02-24 12:02:25 +01:00
Juergen Fitschen
1265efc785 cpu/sam0*: Wrap cortexm_sleep call 2020-02-24 11:48:13 +01:00
Benjamin Valentin
fd9a247200 cpu/sam0_common: use generic exti_config
Creating an `exti_config` array for a new MCU manually is tedious and error prone.
Luckiely all information is already availiable in the vendor files.

Credit for this discovery & method goes to @Sizurka

The file was generated with

```C

int main(void) {
        puts("static const int8_t exti_config[PORT_GROUPS][32] = {");

        for (unsigned port = 1; port < 5; ++port) {
                printf("#if PORT_GROUPS >= %d\n{\n", port);
                for (unsigned pin = 0; pin < 32; ++pin) {
                        printf("#ifdef PIN_P%c%02uA_EIC_EXTINT_NUM\n", '@' + port, pin);
                        printf("    PIN_P%c%02uA_EIC_EXTINT_NUM,\n", '@' + port, pin);
                        printf("#else\n    -1,\n#endif\n");
                }
                printf("},\n#endif\n\n");
        }

        puts("};");

        return 0;
}
```

No changes in generated code are expected, but this makes adding new members
of the sam0 CPU families much easier.
2020-02-20 11:23:51 +01:00
Benjamin Valentin
1496149bba cpu/sam0: don't hard-code peripheral clocks
Instead of hard-coding the peripheral clocks to CLOCK_CORECLOCK
introduce helper functions to return the frequency of the individual
GCLKs and use those for baud-rate calculations.

This requires the GCLK to be part of the peripheral's config struct.
While this is already the case for most peripherals, this also adds
it for those where it wasn't used before.

As it defaults to 0 (CLOCK_CORECLOCK) no change is to be expected.
2020-02-04 21:06:21 +01:00
Benjamin Valentin
a51d167a43 cpu/sam0: use GCLK ID instead of bitmask
To simplify board definitions and for unification between samd2x and
newer models, don't use the GCLK bitmask in board definitions.
Instead use the GCLK index and generate the bitmask when needed.
2020-02-04 21:06:21 +01:00
dylad
bd06772980 sam0/uart: add support for hardware flow control 2019-12-20 21:19:44 +01:00
Benjamin Valentin
0d977b3b3c cpu/sam0_common/periph/uart: implement buffered write
Implement interrupt based uart_write() using a tsrb for the TX buffer.

To enable it, add

    USEMODULE += periph_uart_nonblocking

to your Makefile.
2019-11-27 19:01:00 +01:00
Yegor Yefremov
f2127391c4 doxygen/UART: don't include overridden typedefs
Add missing #ifndefs to overridden UART typedefs.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2019-11-15 10:44:52 +01:00
Yegor Yefremov
df7e760588 doxygen/I2C: don't include overridden typedefs
Add missing #ifndefs to overridden I2C typedefs.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2019-11-15 10:35:33 +01:00
Yegor Yefremov
fa3b0ff04b doxygen/SPI: don't include overridden typedefs
Add missing #ifndefs to overridden SPI typedefs.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2019-11-15 10:35:32 +01:00
1c416185b6
cpu/sam0_common: fix potential undefined result with sercom_id
Scan-build detected that sercom_id could return -1 and the value of this function is affected to uint8_t variables. Since these variables are used for shitfing bit in registers, this could lead to undefined behavior
2019-10-27 12:02:47 +01:00
Benjamin Valentin
c9b827e5d5 sam0_common: export flag that tells if the CPU woke from deep sleep
It is often useful to know whether the CPU was just powered on afresh
or if it was woken from a deep sleep state, e.g. by RTC or GPIO event.
2019-10-01 18:39:40 +02:00
Benjamin Valentin
c9f8ff1cf1 sam0_common: add Watchdog implementation 2019-09-20 19:04:41 +02:00
3241aff71c
sam0_common: add uart modecfg 2019-06-21 10:54:24 +02:00
Benjamin Valentin
f375b00ff3 cpu/samd5x: add support for samd5x/same5x MCUs
This adds supoprt for the Atmel SAMD51 & SAME54 SoC.
The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the samd2x Cortex-M0+ and saml1x Cortex-M23 parts.
2019-06-06 16:47:11 +02:00
Benjamin Valentin
84233ce5d5 sam0_common: replace sercom_id() calculation with switch statement
As the sercom_id() function grows it gets more unweidly.
Let's replace it with a simple switch statement that is true for all
sam0 parts.
2019-05-25 19:12:55 +02:00
Dylan Laduranty
f6ba7ee106 sam0: correct number of PM for SAML10 2019-05-22 17:04:27 +02:00
Benjamin Valentin
849dd4cdce sam0_common: make Timer implementation common across all sam0 MCUs
The currently supported SAM0 MCUs (samd21, saml21, saml1x) share the same
Timer peripheral, yet each of them carries it's own copy of the Timer
driver.

This introduces a new timer driver that is common for all sam0 MCUs and
uses structs for configuration instead of defines.
2019-05-21 11:47:59 +02:00
d7804823db
sam0_common: Add USB peripheral driver 2019-03-26 10:26:11 +01:00
Dylan Laduranty
9450fa7dc3 cpu/sam0_common: add support for saml10/saml11
Add SAML10/SAML11 support through SAM0 because hardware IP are the same so reuse to avoid duplication
2019-01-21 17:06:58 +01:00
13654a950b cpu/samr30: add support for samr30g18a
Co-authored-by: biboc <bapclenet@gmail.com>
2018-10-01 10:15:08 +02:00
Dylan Laduranty
8871e5aaa6
Merge pull request #9876 from fedepell/sercomid-9875
sam0_common: fix sercom_id return value for SERCOM5 (#9875)
2018-09-04 09:10:06 +02:00
Federico Pellegrin
d3cd2b71c0 sam0_common: fix sercom_id return value for SERCOM5 (#9875) 2018-09-03 18:57:18 +02:00
Federico Pellegrin
bfdafe877e sam0_common: correct sercom_set_gen for sercom5. it assumes SERCOM5 GEN clock is in sequence, but is not, need to put a specific if test 2018-09-02 13:39:08 +02:00
smlng
e39ebb1623 cpu/sam0: add doxygen group around i2c_speed_t 2018-07-25 12:01:40 +02:00
dylad
e6bd6bfe3b sam0/i2c: update driver to new API 2018-07-25 12:01:34 +02:00
dylad
a06ace7904 cpu/sam0: share GPIO configuration
Signed-off-by: dylad <dylan.laduranty@mesotic.com>
2017-11-10 10:43:08 +01:00
416ac62fbf pm: unify and set safe default pm_blocker 2017-10-16 14:32:27 +02:00
Dan Evans
531e6f5008 sam0:usart - wake from sleep on receive line 2017-09-25 12:47:31 -06:00
dylad
cca9b7a2c4 cpu/sam0: fix sercom gclk selection 2017-09-15 11:32:32 +02:00
Hauke Petersen
68abdff15a cpu/sam0: optimizations to the shared UART driver 2017-09-04 13:11:05 +02:00
Hauke Petersen
48ef1cd6c9 cpu/sam0_common: added SERCOM clk control functions 2017-09-04 13:08:17 +02:00
dylad
89c885ea40 sam0/uart: merge samd21 & saml21 uart driver
Signed-off-by: dylad <dylan.laduranty@mesotic.com>
2017-08-29 21:26:42 +02:00
24a1aacca2 cpu/sam0: add missing doxygen group definition + cleanup 2017-08-24 14:54:47 +02:00
0fcc7d3834 cleanup: apply headerguard script output 2017-05-24 17:54:02 +02:00
dylad
44dd56c3e8 sam0/adc: merged samd21 & saml21 adc driver
Signed-off-by: dylad <dylan.laduranty@mesotic.com>
2017-05-12 21:02:17 +02:00
Martine Lenders
577048db3a Merge pull request #6687 from dylad/fix_saml21_spi
SAML: Fix SPI SERCOM ID calculation
2017-04-03 20:24:30 +02:00
Hauke Petersen
5c7ed2228d pm_layerd: fix initial value for PM_BLOCKER_INITIAL
the current value was a debugging left-over and should
actually be 0.
2017-03-28 19:32:32 +02:00
dylad
c24c9390e5 cpu/sam0_common/include: fix SERCOM ID calculation for SAML family
Signed-off-by: dylad <dylan.laduranty@mesotic.com>
2017-03-22 21:08:41 +01:00
Hauke Petersen
ea07a6817c cpu/sam0+boards: adapted to new SPI API
- adapted the SPI driver
- merged SPI driver for samr21 and saml21
- adapted all boards using the CPU
2017-01-25 16:46:45 +01:00
245f60edfa cpu: fix typo in author email 2017-01-19 21:45:23 +01:00
Hauke Petersen
fcb1e68732 cpu/sam0: renamed sam21_common to sam0_common 2016-12-15 11:47:03 +01:00