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Commit Graph

16 Commits

Author SHA1 Message Date
Sören Tempel
bd2f5fe110 fe310: fix power management configuration 2020-01-30 10:43:01 +01:00
Francisco
f76f7c73ce
Merge pull request #12957 from aabadie/pr/cpu/fe310_spi
cpu/fe310: add spi peripheral driver
2020-01-14 10:54:47 +01:00
Tristan Bruns
532cdc64ff
cpu/fe310: implement SPI 2020-01-11 13:06:39 +01:00
298d573280
cpu/fe310: provide i2c driver 2020-01-11 13:06:10 +01:00
fc911bf6c5
cpu/fe310: rework clock initialization 2020-01-10 16:41:33 +01:00
97e1c7ba7e
cpu/fe310: reorganize files and includes 2020-01-10 16:41:33 +01:00
e5c64c739a
cpu/fe310: rework uart driver implem/config 2019-12-20 15:22:09 +01:00
b49cca2d0c
cpu/fe310: include thread.h in cpu.h
This ensures the ARRAY_SIZE macro is implicitly available
2019-12-13 16:25:11 +01:00
Marian Buschsieweke
314184adb5
cpu: Platform specific C11 atomics compat headers
Added headers to define platform specific sizes and types for the C11 atomics
compatibility module for C++.
2019-10-24 23:08:36 +02:00
Kevin "Tristate Tom" Weiss
4b7c5915ec
Merge pull request #10953 from gschorcht/sys/shell/heap_cmd/pr
sys/shell: add heap command
2019-10-04 13:49:57 +02:00
kenrabold
1d6e37a7f7 cpu/fe310: interrupt handling cleanup
Cleanup of FE310 interrupt handler code
Optimization of intr context frame
Reduce size of intr stack
Added unhandled trap output
Fix PR #12237
2019-09-27 13:32:43 -07:00
Gunar Schorcht
dfef2ce638 cpu/fe310: changes for common heap command 2019-09-05 09:20:55 +02:00
kenrabold
97d1dc0821 cpu/fe310: Add support for FE310_G002
Added support for FE310_G002 CPU variant that is on new HiFive1B board
2019-07-19 13:25:17 -07:00
smlng
740eafe93b cpu/fe310: add missing PERIPH_TIMER_PROVIDES_SET 2018-09-07 22:15:13 +02:00
kenrabold
db4d67c4fd make: add hifive1 to BOARD_INSUFFICIENT_MEMORY
Added HiFive1 to BOARD_INSUFFICIENT_MEMORY list for examples and tests that are too big to fit

build: fixed missing syscall and cpuid failures

Added missing syscall stubs for nanostubs and fixed compile error with cpuid periph

build: fixed whitespace error

build: add hifive1 to more BOARD_INSUFFICIENT_MEMORY

doc: fixed doxygen warnings

Addressed Doxygen warnings in source file comments

doc: more doxygen fixes

doc: even more doxygen fixes

doc: more changes

build: fix pedantic and rdci_simple build failures

make: exclude lua
2018-05-29 16:27:53 -07:00
kenrabold
7d1d5e77d8 cpu/fe310: add RISC-V cpu FE310
New CPU FE310 from SiFive based on RISC-V architecture

build: add makefile for RISC-V builds

Makefile for builds using RISC-V tools
2018-05-29 15:21:45 -07:00