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boards/nucleo-l496zg: add ADC support

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krzysztof-cabaj 2022-11-19 16:56:57 -05:00
parent afbb568306
commit c7cd72c0bc
3 changed files with 53 additions and 0 deletions
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1
boards/nucleo-l496zg/Kconfig
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@ -15,6 +15,7 @@ config BOARD_NUCLEO_L496ZG
select CPU_MODEL_STM32L496ZG select CPU_MODEL_STM32L496ZG
# Put defined MCU peripherals here (in alphabetical order) # Put defined MCU peripherals here (in alphabetical order)
select HAS_PERIPH_ADC
select HAS_PERIPH_I2C select HAS_PERIPH_I2C
select HAS_PERIPH_LPUART select HAS_PERIPH_LPUART
select HAS_PERIPH_PWM select HAS_PERIPH_PWM

1
boards/nucleo-l496zg/Makefile.features
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@ -2,6 +2,7 @@ CPU = stm32
CPU_MODEL = stm32l496zg CPU_MODEL = stm32l496zg
# Put defined MCU peripherals here (in alphabetical order) # Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_adc
FEATURES_PROVIDED += periph_i2c FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_pwm FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc FEATURES_PROVIDED += periph_rtc

51
boards/nucleo-l496zg/include/periph_conf.h
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@ -156,6 +156,57 @@ static const spi_conf_t spi_config[] = {
#define SPI_NUMOF ARRAY_SIZE(spi_config) #define SPI_NUMOF ARRAY_SIZE(spi_config)
/** @} */ /** @} */
/**
* @brief ADC configuration
*
* Note that we do not configure all ADC channels,
* and not in the STM32L496ZG order. Instead, we
* just define 6 ADC channels, for the Nucleo
* Arduino header pins A0-A5 and the internal VBAT channel.
*
* To find appropriate device and channel find in the
* board manual, table showing pin assignments and
* information about ADC - a text similar to ADC[X]_IN[Y],
* where:
* [X] - describes used device - indexed from 0,
* for example ADC1_IN10 is device 0,
* [Y] - describes used channel - indexed from 1,
* for example ADC1_IN10 is channel 10
*
* For Nucleo-L496ZG this information is in board manual,
* Table 11, page 38.
*
* @{
*/
static const adc_conf_t adc_config[] = {
{ .pin = GPIO_PIN(PORT_A, 3), .dev = 0, .chan = 8 }, /* ADC12_IN8 */
{ .pin = GPIO_PIN(PORT_C, 0), .dev = 0, .chan = 1 }, /* ADC123_IN1 */
{ .pin = GPIO_PIN(PORT_C, 3), .dev = 0, .chan = 4 }, /* ADC123_IN4 */
{ .pin = GPIO_PIN(PORT_C, 1), .dev = 0, .chan = 2 }, /* ADC123_IN2 */
{ .pin = GPIO_PIN(PORT_C, 4), .dev = 0, .chan = 13 }, /* ADC12_IN13 */
{ .pin = GPIO_PIN(PORT_C, 5), .dev = 0, .chan = 14 }, /* ADC12_IN14 */
/* VBAT is connected ADC1_IN18 or ADC3_IN18 and a voltage divider
* is used, so that only 1/3 of the actual VBAT is measured. This
* allows for a supply voltage higher than the reference voltage.
*
* For Nucleo-L496ZG more information is provided in MCU datasheet,
in section 3.17.3 - Vbat battery voltaga monioring, page 43.
*/
{ .pin = GPIO_UNDEF, .dev = 0, .chan = 18 },
};
/**
* @brief Number of ADC devices
*/
#define ADC_NUMOF ARRAY_SIZE(adc_config)
/**
* @brief VBAT ADC line
*/
#define VBAT_ADC ADC_LINE(6)
/** @} */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif