RIOT-OS/RIOT
RIOT-OS/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00
Code Releases Activity

boards/kinetis: replace GPIO_UNDEF with SPI_CS_UNDEF

Browse Source
This commit is contained in:
Alexandre Abadie 2022-01-04 12:37:38 +01:00
parent 796e127df9
commit c6c31f0361
No known key found for this signature in database
GPG Key ID: 1C919A403CAE1405
10 changed files with 58 additions and 43 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
boards/frdm-k22f/include/periph_conf.h
View File

@ -241,9 +241,9 @@ static const spi_conf_t spi_config[] = {
.pin_cs = {
GPIO_PIN(PORT_C, 4),
GPIO_PIN(PORT_D, 4),
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF
},
.pcr = GPIO_AF_2,
.simmask = SIM_SCGC6_SPI0_MASK

8
boards/frdm-k64f/include/periph_conf.h
View File

@ -237,10 +237,10 @@ static const spi_conf_t spi_config[] = {
.pin_clk = GPIO_PIN(PORT_D, 1),
.pin_cs = {
GPIO_PIN(PORT_D, 0),
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF
},
.pcr = GPIO_AF_2,
.simmask = SIM_SCGC6_SPI0_MASK

16
boards/frdm-kw41z/include/periph_conf.h
View File

@ -40,10 +40,10 @@ static const spi_conf_t spi_config[] = {
.pin_clk = GPIO_PIN(PORT_C, 16),
.pin_cs = {
GPIO_PIN(PORT_C, 19),
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF
},
.pcr = GPIO_AF_2,
.simmask = SIM_SCGC6_SPI0_MASK
@ -55,10 +55,10 @@ static const spi_conf_t spi_config[] = {
.pin_clk = GPIO_PIN(PORT_A, 18),
.pin_cs = {
GPIO_PIN(PORT_A, 19),
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF
},
.pcr = GPIO_AF_2,
.simmask = SIM_SCGC6_SPI1_MASK

10
boards/mulle/include/periph_conf.h
View File

@ -312,7 +312,7 @@ static const spi_conf_t spi_config[] = {
GPIO_PIN(PORT_D, 4),
GPIO_PIN(PORT_D, 5),
GPIO_PIN(PORT_D, 6),
GPIO_UNDEF
SPI_CS_UNDEF,
},
.pcr = GPIO_AF_2,
.simmask = SIM_SCGC6_SPI0_MASK
@ -324,10 +324,10 @@ static const spi_conf_t spi_config[] = {
.pin_clk = GPIO_PIN(PORT_E, 2),
.pin_cs = {
GPIO_PIN(PORT_E, 4),
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
},
.pcr = GPIO_AF_2,
.simmask = SIM_SCGC6_SPI1_MASK

8
boards/openlabs-kw41z-mini/include/periph_conf.h
View File

@ -315,10 +315,10 @@ static const spi_conf_t spi_config[] = {
.pin_clk = GPIO_PIN(PORT_C, 16),
.pin_cs = {
GPIO_PIN(PORT_C, 19),
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
},
.pcr = (gpio_pcr_t)(GPIO_AF_2 | GPIO_IN_PU),
.simmask = SIM_SCGC6_SPI0_MASK

16
boards/pba-d-01-kw2x/include/periph_conf.h
View File

@ -223,10 +223,10 @@ static const spi_conf_t spi_config[] = {
.pin_clk = GPIO_PIN(PORT_C, 5),
.pin_cs = {
GPIO_PIN(PORT_C, 4),
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
},
.pcr = GPIO_AF_2,
.simmask = SIM_SCGC6_SPI0_MASK
@ -238,10 +238,10 @@ static const spi_conf_t spi_config[] = {
.pin_clk = GPIO_PIN(PORT_B, 11),
.pin_cs = {
GPIO_PIN(PORT_B, 10),
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
},
.pcr = GPIO_AF_2,
.simmask = SIM_SCGC6_SPI1_MASK

8
boards/phynode-kw41z/include/periph_conf.h
View File

@ -42,10 +42,10 @@ static const spi_conf_t spi_config[] = {
.pin_clk = GPIO_PIN(PORT_A, 18),
.pin_cs = {
GPIO_PIN(PORT_A, 19),
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
},
.pcr = GPIO_AF_2,
.simmask = SIM_SCGC6_SPI1_MASK

8
boards/usb-kw41z/include/periph_conf.h
View File

@ -39,10 +39,10 @@ static const spi_conf_t spi_config[] = {
.pin_clk = GPIO_PIN(PORT_A, 18),
.pin_cs = {
GPIO_PIN(PORT_A, 19),
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF,
GPIO_UNDEF
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
SPI_CS_UNDEF,
},
.pcr = GPIO_AF_2,
.simmask = SIM_SCGC6_SPI1_MASK

17
cpu/kinetis/include/periph_cpu.h
View File

@ -115,6 +115,21 @@ typedef uint16_t gpio_t;
*/
#define SPI_HWCS_NUMOF (5)
/**
* @brief Define value for unused CS line
*/
#define SPI_CS_UNDEF (GPIO_UNDEF)
#ifndef DOXYGEN
/**
* @brief Overwrite the default spi_cs_t type definition
* @{
*/
#define HAVE_SPI_CS_T
typedef uint32_t spi_cs_t;
/** @} */
#endif
/**
* @name This CPU makes use of the following shared SPI functions
* @{
@ -454,7 +469,7 @@ typedef struct {
gpio_t pin_miso; /**< MISO pin used */
gpio_t pin_mosi; /**< MOSI pin used */
gpio_t pin_clk; /**< CLK pin used */
gpio_t pin_cs[SPI_HWCS_NUMOF]; /**< pins used for HW cs lines */
spi_cs_t pin_cs[SPI_HWCS_NUMOF]; /**< pins used for HW cs lines */
#ifdef KINETIS_HAVE_PCR
gpio_pcr_t pcr; /**< alternate pin function values */
#endif /* KINETIS_HAVE_PCR */

4
cpu/kinetis/periph/spi.c
View File

@ -30,6 +30,7 @@
#include "cpu.h"
#include "mutex.h"
#include "periph/gpio.h"
#include "periph/spi.h"
#define ENABLE_DEBUG 0
@ -135,8 +136,7 @@ int spi_init_cs(spi_t bus, spi_cs_t cs)
gpio_init((gpio_t)cs, GPIO_OUT);
}
else {
if ((cs >= SPI_HWCS_NUMOF) ||
(spi_config[bus].pin_cs[cs] == GPIO_UNDEF)) {
if ((cs >= SPI_HWCS_NUMOF) || !gpio_is_valid(spi_config[bus].pin_cs[cs])) {
return SPI_NOCS;
}
gpio_init_port(spi_config[bus].pin_cs[cs], spi_config[bus].pcr);