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cpu/sam0_common: implement periph_uart_collision feature

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This commit is contained in:
Benjamin Valentin 2021-07-26 14:42:36 +02:00
parent f89d0c7c25
commit a51fb298dc
9 changed files with 89 additions and 0 deletions
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76
cpu/sam0_common/periph/uart.c
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@ -322,6 +322,82 @@ void uart_poweroff(uart_t uart)
sercom_clk_dis(dev(uart));
}
#ifdef MODULE_PERIPH_UART_COLLISION
bool uart_collision_detected(uart_t uart)
{
/* In case of collision, the CTRLB register
* will be in sync during disabling of TX,
* then the flag will be set.
*/
_syncbusy(dev(uart));
bool collision = dev(uart)->STATUS.bit.COLL;
dev(uart)->STATUS.reg = SERCOM_USART_STATUS_COLL;
return collision;
}
void uart_collision_detect_enable(uart_t uart)
{
/* CTRLB is enable protected */
dev(uart)->CTRLA.bit.ENABLE = 0;
_syncbusy(dev(uart));
/* clear stale collision flag */
dev(uart)->STATUS.reg = SERCOM_USART_STATUS_COLL;
/* enable collision detection */
dev(uart)->CTRLB.bit.COLDEN = 1;
/* disable RX interrupt */
dev(uart)->INTENCLR.bit.RXC = 1;
/* re-enable UART */
dev(uart)->CTRLA.bit.ENABLE = 1;
/* wait for config to be applied */
_syncbusy(dev(uart));
}
static void _drain_rxbuf(SercomUsart *dev)
{
/* clear readback bytes from receive buffer */
while (dev->INTFLAG.bit.RXC) {
dev->DATA.reg;
}
}
void uart_collision_detect_disable(uart_t uart)
{
uint32_t ctrlb = dev(uart)->CTRLB.reg;
/* re-enable TX after collision */
ctrlb |= SERCOM_USART_CTRLB_TXEN;
/* disable collision detection */
ctrlb &= ~SERCOM_USART_CTRLB_COLDEN;
/* CTRLB is enable protected */
dev(uart)->CTRLA.bit.ENABLE = 0;
_syncbusy(dev(uart));
dev(uart)->CTRLB.reg = ctrlb;
/* re-enable UART */
dev(uart)->CTRLA.bit.ENABLE = 1;
/* wait for config to be applied */
_syncbusy(dev(uart));
/* clear bytes from RX buffer */
_drain_rxbuf(dev(uart));
/* re-enable RX complete IRQ */
if (uart_ctx[uart].rx_cb) {
dev(uart)->INTENSET.bit.RXC = 1;
}
}
#endif
#ifdef MODULE_PERIPH_UART_MODECFG
int uart_mode(uart_t uart, uart_data_bits_t data_bits, uart_parity_t parity,
uart_stop_bits_t stop_bits)

3
cpu/samd21/Kconfig
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@ -16,6 +16,7 @@ config CPU_FAM_SAMD10
bool
select CPU_COMMON_SAMD21
select HAS_PERIPH_DMA
select HAS_PERIPH_UART_COLLISION
config CPU_FAM_SAMD20
bool
@ -25,11 +26,13 @@ config CPU_FAM_SAMD21
bool
select CPU_COMMON_SAMD21
select HAS_PERIPH_DMA
select HAS_PERIPH_UART_COLLISION
config CPU_FAM_SAMR21
bool
select CPU_COMMON_SAMD21
select HAS_PERIPH_DMA
select HAS_PERIPH_UART_COLLISION
## Definition of specific features
config HAS_CPU_SAMD21

4
cpu/samd21/Makefile.features
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@ -2,4 +2,8 @@ CPU_CORE = cortex-m0plus
FEATURES_PROVIDED += periph_gpio_fast_read
ifeq (,$(filter samd20%,$(CPU_MODEL)))
FEATURES_PROVIDED += periph_uart_collision
endif
-include $(RIOTCPU)/sam0_common/Makefile.features

1
cpu/samd5x/Kconfig
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@ -16,6 +16,7 @@ config CPU_COMMON_SAMD5X
select HAS_PERIPH_GPIO_TAMPER_WAKE
select HAS_PERIPH_HWRNG
select HAS_PERIPH_RTC_MEM
select HAS_PERIPH_UART_COLLISION
select HAS_PERIPH_SPI_ON_QSPI
config CPU_FAM_SAMD51

1
cpu/samd5x/Makefile.features
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@ -6,5 +6,6 @@ FEATURES_PROVIDED += cortexm_mpu
FEATURES_PROVIDED += periph_gpio_tamper_wake
FEATURES_PROVIDED += periph_rtc_mem
FEATURES_PROVIDED += periph_spi_on_qspi
FEATURES_PROVIDED += periph_uart_collision
include $(RIOTCPU)/sam0_common/Makefile.features

1
cpu/saml1x/Kconfig
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@ -13,6 +13,7 @@ config CPU_COMMON_SAML1X
select HAS_PERIPH_DMA
select HAS_PERIPH_GPIO_FAST_READ
select HAS_PERIPH_HWRNG
select HAS_PERIPH_UART_COLLISION
config CPU_FAM_SAML10
bool

1
cpu/saml1x/Makefile.features
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@ -5,5 +5,6 @@ CPU_CORE = cortex-m23
FEATURES_PROVIDED += periph_hwrng
FEATURES_PROVIDED += periph_gpio_fast_read
FEATURES_PROVIDED += periph_uart_collision
include $(RIOTCPU)/sam0_common/Makefile.features

1
cpu/saml21/Kconfig
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@ -14,6 +14,7 @@ config CPU_COMMON_SAML21
select HAS_PERIPH_DMA
select HAS_PERIPH_GPIO_FAST_READ
select HAS_PERIPH_RTC_MEM
select HAS_PERIPH_UART_COLLISION
config CPU_FAM_SAML21
bool

1
cpu/saml21/Makefile.features
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@ -4,6 +4,7 @@ CPU_CORE = cortex-m0plus
CPU_MODELS_WITHOUT_HWRNG += samr30%
FEATURES_PROVIDED += periph_gpio_fast_read
FEATURES_PROVIDED += periph_uart_collision
# Low Power SRAM is *not* retained during Backup Sleep.
# It therefore does not fulfill the requirements of the 'backup_ram' interface.