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cpu/lpc2387: convert periph/spi to struct based operation
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18
cpu/lpc2387/include/vendor/lpc23xx.h
vendored
18
cpu/lpc2387/include/vendor/lpc23xx.h
vendored
@ -809,8 +809,25 @@ typedef struct {
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#define S0SPCCR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C))
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#define S0SPCCR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C))
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#define S0SPINT (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C))
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#define S0SPINT (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C))
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/**
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* @brief Generic SPI register map
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*/
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typedef struct {
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REG32 CR0; /**< Control Register 0 */
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REG32 CR1; /**< Control Register 1 */
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REG32 DR; /**< Data Register */
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REG32 SR; /**< Status Register */
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REG32 CPSR; /**< Clock Prescale Register */
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REG32 IMSC; /**< Interrupt Mask Set/Clear Register */
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REG32 RIS; /**< Raw Interrupt Status Register */
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REG32 MIS; /**< Masked Interrupt Status Register */
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REG32 ICR; /**< Interrupt Clear Register */
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REG32 DMACR; /**< DMA Control Register */
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} lpc23xx_spi_t;
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/* SSP0 Controller */
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/* SSP0 Controller */
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#define SSP0_BASE_ADDR 0xE0068000
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#define SSP0_BASE_ADDR 0xE0068000
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#define SPI0 ((lpc23xx_spi_t *)SSP0_BASE_ADDR)
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#define SSP0CR0 (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x00))
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#define SSP0CR0 (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x00))
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#define SSP0CR1 (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x04))
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#define SSP0CR1 (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x04))
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#define SSP0DR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x08))
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#define SSP0DR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x08))
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@ -824,6 +841,7 @@ typedef struct {
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/* SSP1 Controller */
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/* SSP1 Controller */
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#define SSP1_BASE_ADDR 0xE0030000
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#define SSP1_BASE_ADDR 0xE0030000
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#define SPI1 ((lpc23xx_spi_t *)SSP1_BASE_ADDR)
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#define SSP1CR0 (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x00))
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#define SSP1CR0 (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x00))
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#define SSP1CR1 (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x04))
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#define SSP1CR1 (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x04))
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#define SSP1DR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x08))
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#define SSP1DR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x08))
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@ -34,9 +34,9 @@
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#define ENABLE_DEBUG (0)
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#include "debug.h"
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#define SPI_TX_EMPTY (SSP0SR & SSPSR_TFE)
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#define SPI_TX_EMPTY (SPI0->SR & SSPSR_TFE)
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#define SPI_BUSY (SSP0SR & SSPSR_BSY)
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#define SPI_BUSY (SPI0->SR & SSPSR_BSY)
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#define SPI_RX_AVAIL (SSP0SR & SSPSR_RNE)
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#define SPI_RX_AVAIL (SPI0->SR & SSPSR_RNE)
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/**
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/**
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* @brief Array holding one pre-initialized mutex for each SPI device
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* @brief Array holding one pre-initialized mutex for each SPI device
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@ -80,21 +80,21 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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/* power on */
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/* power on */
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PCONP |= (PCSSP0);
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PCONP |= (PCSSP0);
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/* interface setup */
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/* interface setup */
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SSP0CR0 = 7;
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SPI0->CR0 = 7;
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/* configure bus clock */
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/* configure bus clock */
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lpc2387_pclk_scale(CLOCK_CORECLOCK / 1000, (uint32_t)clk, &pclksel, &cpsr);
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lpc2387_pclk_scale(CLOCK_CORECLOCK / 1000, (uint32_t)clk, &pclksel, &cpsr);
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PCLKSEL1 &= ~(BIT10 | BIT11); /* CCLK to PCLK divider*/
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PCLKSEL1 &= ~(BIT10 | BIT11); /* CCLK to PCLK divider*/
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PCLKSEL1 |= pclksel << 10;
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PCLKSEL1 |= pclksel << 10;
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SSP0CPSR = cpsr;
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SPI0->CPSR = cpsr;
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/* enable the bus */
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/* enable the bus */
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SSP0CR1 |= BIT1;
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SPI0->CR1 |= BIT1;
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/* clear RxFIFO */
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/* clear RxFIFO */
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int dummy;
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int dummy;
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while (SPI_RX_AVAIL) { /* while RNE (Receive FIFO Not Empty)...*/
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while (SPI_RX_AVAIL) { /* while RNE (Receive FIFO Not Empty)...*/
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dummy = SSP0DR; /* read data*/
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dummy = SPI0->DR; /* read data*/
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}
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}
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(void) dummy; /* to suppress unused-but-set-variable */
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(void) dummy; /* to suppress unused-but-set-variable */
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@ -105,7 +105,7 @@ void spi_release(spi_t bus)
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{
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{
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(void) bus;
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(void) bus;
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/* disable, power off, and release the bus */
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/* disable, power off, and release the bus */
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SSP0CR1 &= ~(BIT1);
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SPI0->CR1 &= ~(BIT1);
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PCONP &= ~(PCSSP0);
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PCONP &= ~(PCSSP0);
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mutex_unlock(&lock);
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mutex_unlock(&lock);
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}
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}
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@ -127,10 +127,10 @@ void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
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for (size_t i = 0; i < len; i++) {
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for (size_t i = 0; i < len; i++) {
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uint8_t tmp = (out_buf) ? out_buf[i] : 0;
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uint8_t tmp = (out_buf) ? out_buf[i] : 0;
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while (!SPI_TX_EMPTY) {}
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while (!SPI_TX_EMPTY) {}
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SSP0DR = tmp;
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SPI0->DR = tmp;
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while (SPI_BUSY) {}
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while (SPI_BUSY) {}
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while (!SPI_RX_AVAIL) {}
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while (!SPI_RX_AVAIL) {}
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tmp = (uint8_t)SSP0DR;
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tmp = (uint8_t)SPI0->DR;
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if (in_buf) {
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if (in_buf) {
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in_buf[i] = tmp;
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in_buf[i] = tmp;
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}
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}
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