mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
Merge pull request #8354 from aabadie/board/mkrwan1300
boards/arduino-mkrwan1300: add initial support (without LoRa)
This commit is contained in:
commit
9659eec1f1
@ -46,6 +46,8 @@ extern "C" {
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#define LED0_ON (LED_PORT.OUTSET.reg = LED0_MASK)
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#define LED0_OFF (LED_PORT.OUTCLR.reg = LED0_MASK)
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#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK)
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#define LED0_NAME "LED(Green)"
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/** @} */
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#ifdef __cplusplus
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|
@ -57,6 +57,8 @@ extern "C" {
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#define LED0_ON (LED_PORT.OUTSET.reg = LED0_MASK)
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#define LED0_OFF (LED_PORT.OUTCLR.reg = LED0_MASK)
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#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK)
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#define LED0_NAME "LED(Green)"
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/** @} */
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#ifdef __cplusplus
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|
5
boards/arduino-mkrwan1300/Makefile
Normal file
5
boards/arduino-mkrwan1300/Makefile
Normal file
@ -0,0 +1,5 @@
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MODULE = board
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DIRS = $(RIOTBOARD)/common/arduino-mkr
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include $(RIOTBASE)/Makefile.base
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1
boards/arduino-mkrwan1300/Makefile.dep
Normal file
1
boards/arduino-mkrwan1300/Makefile.dep
Normal file
@ -0,0 +1 @@
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include $(RIOTBOARD)/common/arduino-mkr/Makefile.dep
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1
boards/arduino-mkrwan1300/Makefile.features
Normal file
1
boards/arduino-mkrwan1300/Makefile.features
Normal file
@ -0,0 +1 @@
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include $(RIOTBOARD)/common/arduino-mkr/Makefile.features
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10
boards/arduino-mkrwan1300/Makefile.include
Normal file
10
boards/arduino-mkrwan1300/Makefile.include
Normal file
@ -0,0 +1,10 @@
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USEMODULE += boards_common_arduino-mkr
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ifeq ($(PROGRAMMER),jlink)
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export MKR_JLINK_DEVICE = atsamd21
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endif
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include $(RIOTBOARD)/common/arduino-mkr/Makefile.include
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# add arduino-mkrwan1300 include path
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INCLUDES += -I$(RIOTBOARD)/$(BOARD)/include
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37
boards/arduino-mkrwan1300/doc.txt
Normal file
37
boards/arduino-mkrwan1300/doc.txt
Normal file
@ -0,0 +1,37 @@
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/**
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* @defgroup boards_arduino-mkrwan1300 Arduino MKR WAN 1300
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* @ingroup boards
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* @brief Support for the Arduino MKR WAN 1300 board.
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*
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* ### General information
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*
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* The [Arduino MKR WAN 1300](https://store.arduino.cc/mkr-wan-1300) board is
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* a learning and development board that provides LoRa connectivity and is
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* powered by an Atmel SAMD21 microcontroller.
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*
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* ### Pinout
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*
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* <img src="https://www.arduino.cc/en/uploads/Main/MKR1000_pinout.png"
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* alt="Arduino MKR WAN 1300 pinout" style="height:800px;"/>
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*
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* ### Flash the board
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*
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* 1. Put the board in bootloader mode by double tapping the reset button.<br/>
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* When the board is in bootloader mode, the user led (amber) oscillates
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* smoothly.
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*
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*
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* 2. Use `BOARD=arduino-mkrwan1300` with the `make` command.<br/>
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* Example with `hello-world` application:
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* ```
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* make BOARD=arduino-mkrwan1300 -C examples/hello-world flash
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* ```
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*
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* @warning Unplug the board from the anti-static protective foam before
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* starting to use it otherwise it may not work as expected.
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*
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* ### Accessing STDIO via UART
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*
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* To access the STDIO of RIOT, a FTDI to USB converted needs to be plugged to
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* the RX/TX pins on the board.
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*/
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59
boards/arduino-mkrwan1300/include/board.h
Normal file
59
boards/arduino-mkrwan1300/include/board.h
Normal file
@ -0,0 +1,59 @@
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/*
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* Copyright (C) 2018 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_arduino-mkrwan1300
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* @brief Support for the Arduino MKRWAN1300 board.
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* @{
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*
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* @file
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* @brief Board specific definitions for the Arduino MKRWAN1300
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* board
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef BOARD_H
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#define BOARD_H
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#include "cpu.h"
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#include "periph_conf.h"
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#include "board_common.h"
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#include "arduino_pinmap.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief The on-board LED is connected to pin 6 on this board
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*/
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#define ARDUINO_LED (6U)
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/**
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* @name LED pin definitions and handlers
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* @{
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*/
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#define LED0_PIN GPIO_PIN(PA, 20)
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#define LED_PORT PORT->Group[PA]
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#define LED0_MASK (1 << 20)
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#define LED0_ON (LED_PORT.OUTSET.reg = LED0_MASK)
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#define LED0_OFF (LED_PORT.OUTCLR.reg = LED0_MASK)
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#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK)
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#define LED0_NAME "LED(Amber)"
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* BOARD_H */
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/** @} */
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94
boards/arduino-mkrwan1300/include/periph_conf.h
Normal file
94
boards/arduino-mkrwan1300/include/periph_conf.h
Normal file
@ -0,0 +1,94 @@
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/*
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* Copyright (C) 2016 Freie Universität Berlin
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* 2016-2018 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_arduino-mkrwan1300
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* @{
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*
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* @file
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* @brief Configuration of CPU peripherals for Arduino MKRWAN1300 board
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*
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* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Peter Kietzmann <peter.kietzmann@haw-hamburg.de>
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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* @author Bumsik kim <kbumsik@gmail.com>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#include "periph_conf_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = &SERCOM5->USART,
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.rx_pin = GPIO_PIN(PB,23), /* ARDUINO_PIN_13, RX Pin */
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.tx_pin = GPIO_PIN(PB,22), /* ARDUINO_PIN_14, TX Pin */
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.mux = GPIO_MUX_D,
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.rx_pad = UART_PAD_RX_3,
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.tx_pad = UART_PAD_TX_2,
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.flags = UART_FLAG_NONE,
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.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
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},
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{ /* LoRa module */
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.dev = &SERCOM4->USART,
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.rx_pin = GPIO_PIN(PA,15),
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.tx_pin = GPIO_PIN(PA,12),
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.mux = GPIO_MUX_D,
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.rx_pad = UART_PAD_RX_3,
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.tx_pad = UART_PAD_TX_0,
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.flags = UART_FLAG_NONE,
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.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
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},
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};
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/* interrupt function name mapping */
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#define UART_0_ISR isr_sercom5
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#define UART_1_ISR isr_sercom4
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#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = &SERCOM1->SPI,
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.miso_pin = GPIO_PIN(PA, 19), /* ARDUINO_PIN_8, SERCOM1-MISO */
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.mosi_pin = GPIO_PIN(PA, 16), /* ARDUINO_PIN_10, SERCOM1-MOSI */
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.clk_pin = GPIO_PIN(PA, 17), /* ARDUINO_PIN_9, SERCOM1-SCK */
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.miso_mux = GPIO_MUX_C,
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.mosi_mux = GPIO_MUX_C,
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.clk_mux = GPIO_MUX_C,
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.miso_pad = SPI_PAD_MISO_3,
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.mosi_pad = SPI_PAD_MOSI_0_SCK_1
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}
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};
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#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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@ -60,6 +60,8 @@ extern "C" {
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#define LED0_ON (LED_PORT.OUTSET.reg = LED0_MASK)
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#define LED0_OFF (LED_PORT.OUTCLR.reg = LED0_MASK)
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#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK)
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#define LED0_NAME "LED(Green)"
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/** @} */
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#ifdef __cplusplus
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@ -34,7 +34,7 @@ extern "C" {
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static const saul_gpio_params_t saul_gpio_params[] =
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{
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{
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.name = "LED(Green)",
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.name = LED0_NAME,
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.pin = LED0_PIN,
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.mode = GPIO_OUT
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},
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@ -25,102 +25,12 @@
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#include "periph_conf_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name External oscillator and clock configuration
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*
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* For selection of the used CORECLOCK, we have implemented two choices:
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*
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* - usage of the PLL fed by the internal 8MHz oscillator divided by 8
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* - usage of the internal 8MHz oscillator directly, divided by N if needed
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*
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*
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* The PLL option allows for the usage of a wider frequency range and a more
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* stable clock with less jitter. This is why we use this option as default.
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*
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* The target frequency is computed from the PLL multiplier and the PLL divisor.
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* Use the following formula to compute your values:
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*
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* CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV
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*
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* NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL
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* frequency is 96MHz. So PLL_MULL must be between 31 and 95!
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*
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*
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* The internal Oscillator used directly can lead to a slightly better power
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* efficiency to the cost of a less stable clock. Use this option when you know
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* what you are doing! The actual core frequency is adjusted as follows:
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*
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* CORECLOCK = 8MHz / DIV
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*
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* NOTE: A core clock frequency below 1MHz is not recommended
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*
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* @{
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*/
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#define CLOCK_USE_PLL (1)
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#if CLOCK_USE_PLL
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/* edit these values to adjust the PLL output frequency */
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#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
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#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
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/* generate the actual used core clock frequency */
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#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
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#else
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/* edit this value to your needs */
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#define CLOCK_DIV (1U)
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/* generate the actual core clock frequency */
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#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
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#endif
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/** @} */
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/**
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* @name Timer peripheral configuration
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* @{
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*/
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static const tc32_conf_t timer_config[] = {
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{ /* Timer 0 - System Clock */
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.dev = TC3,
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.irq = TC3_IRQn,
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.pm_mask = PM_APBCMASK_TC3,
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.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = GCLK_CLKCTRL_GEN(1),
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = GCLK_CLKCTRL_GEN(0),
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT16,
|
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},
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{ /* Timer 1 */
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.dev = TC4,
|
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.irq = TC4_IRQn,
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.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
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.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
|
||||
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
|
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.gclk_src = GCLK_CLKCTRL_GEN(1),
|
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
|
||||
#else
|
||||
.gclk_src = GCLK_CLKCTRL_GEN(0),
|
||||
.prescaler = TC_CTRLA_PRESCALER_DIV8,
|
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#endif
|
||||
.flags = TC_CTRLA_MODE_COUNT32,
|
||||
}
|
||||
};
|
||||
|
||||
#define TIMER_0_MAX_VALUE 0xffff
|
||||
|
||||
/* interrupt function name mapping */
|
||||
#define TIMER_0_ISR isr_tc3
|
||||
#define TIMER_1_ISR isr_tc4
|
||||
|
||||
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name UART configuration
|
||||
* @{
|
||||
@ -144,63 +54,6 @@ static const uart_conf_t uart_config[] = {
|
||||
#define UART_NUMOF ARRAY_SIZE(uart_config)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name PWM configuration
|
||||
* @{
|
||||
*/
|
||||
#define PWM_0_EN 1
|
||||
#define PWM_MAX_CHANNELS (2U)
|
||||
/* for compatibility with test application */
|
||||
#define PWM_0_CHANNELS PWM_MAX_CHANNELS
|
||||
|
||||
/* PWM device configuration */
|
||||
static const pwm_conf_t pwm_config[] = {
|
||||
#if PWM_0_EN
|
||||
{TCC0, {
|
||||
/* GPIO pin, MUX value, TCC channel */
|
||||
{ GPIO_PIN(PA, 10), GPIO_MUX_F, 2 }, /* ~2 */
|
||||
{ GPIO_PIN(PA, 11), GPIO_MUX_F, 3 }, /* ~3 */
|
||||
}}
|
||||
#endif
|
||||
};
|
||||
|
||||
/* number of devices that are actually defined */
|
||||
#define PWM_NUMOF ARRAY_SIZE(pwm_config)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name ADC configuration
|
||||
* @{
|
||||
*/
|
||||
#define ADC_0_EN 1
|
||||
#define ADC_MAX_CHANNELS 14
|
||||
/* ADC 0 device configuration */
|
||||
#define ADC_0_DEV ADC
|
||||
#define ADC_0_IRQ ADC_IRQn
|
||||
|
||||
/* ADC 0 Default values */
|
||||
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */
|
||||
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
|
||||
|
||||
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
|
||||
#define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
|
||||
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
|
||||
|
||||
static const adc_conf_chan_t adc_channels[] = {
|
||||
/* port, pin, muxpos */
|
||||
{GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0}, /* A0 */
|
||||
{GPIO_PIN(PB, 2), ADC_INPUTCTRL_MUXPOS_PIN10}, /* A1 */
|
||||
{GPIO_PIN(PB, 3), ADC_INPUTCTRL_MUXPOS_PIN11}, /* A2 */
|
||||
{GPIO_PIN(PA, 4), ADC_INPUTCTRL_MUXPOS_PIN4}, /* A3 */
|
||||
{GPIO_PIN(PA, 5), ADC_INPUTCTRL_MUXPOS_PIN5}, /* A4 */
|
||||
{GPIO_PIN(PA, 6), ADC_INPUTCTRL_MUXPOS_PIN6}, /* A5 */
|
||||
{GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7}, /* A6 */
|
||||
};
|
||||
|
||||
#define ADC_0_CHANNELS (7U)
|
||||
#define ADC_NUMOF ADC_0_CHANNELS
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name SPI configuration
|
||||
* @{
|
||||
@ -233,60 +86,6 @@ static const spi_conf_t spi_config[] = {
|
||||
#define SPI_NUMOF ARRAY_SIZE(spi_config)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name I2C configuration
|
||||
* @{
|
||||
*/
|
||||
static const i2c_conf_t i2c_config[] = {
|
||||
{
|
||||
.dev = &(SERCOM0->I2CM),
|
||||
.speed = I2C_SPEED_NORMAL,
|
||||
.scl_pin = GPIO_PIN(PA, 9),
|
||||
.sda_pin = GPIO_PIN(PA, 8),
|
||||
.mux = GPIO_MUX_C,
|
||||
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
|
||||
.flags = I2C_FLAG_NONE
|
||||
}
|
||||
};
|
||||
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name USB peripheral configuration
|
||||
* @{
|
||||
*/
|
||||
static const sam0_common_usb_config_t sam_usbdev_config[] = {
|
||||
{
|
||||
.dm = GPIO_PIN(PA, 24),
|
||||
.dp = GPIO_PIN(PA, 25),
|
||||
.d_mux = GPIO_MUX_G,
|
||||
.device = &USB->DEVICE,
|
||||
}
|
||||
};
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name RTC configuration
|
||||
* @{
|
||||
*/
|
||||
#define RTC_NUMOF (1U)
|
||||
#define RTC_DEV RTC->MODE2
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name RTT configuration
|
||||
* @{
|
||||
*/
|
||||
#define RTT_NUMOF (1U)
|
||||
#define RTT_DEV RTC->MODE0
|
||||
#define RTT_IRQ RTC_IRQn
|
||||
#define RTT_IRQ_PRIO 10
|
||||
#define RTT_ISR isr_rtc
|
||||
#define RTT_MAX_VALUE (0xffffffff)
|
||||
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
|
||||
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
242
boards/common/arduino-mkr/include/periph_conf_common.h
Normal file
242
boards/common/arduino-mkr/include/periph_conf_common.h
Normal file
@ -0,0 +1,242 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Freie Universität Berlin
|
||||
* 2016-2017 Inria
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
* directory for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup boards_common_arduino-mkr
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Common configuration for clock, timer, pwm, adc, rtc and rtt
|
||||
* peripherals for Arduino MKR boards
|
||||
*
|
||||
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
|
||||
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
|
||||
* @author Peter Kietzmann <peter.kietzmann@haw-hamburg.de>
|
||||
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
|
||||
* @author Bumsik kim <kbumsik@gmail.com>
|
||||
*/
|
||||
|
||||
#ifndef PERIPH_CONF_COMMON_H
|
||||
#define PERIPH_CONF_COMMON_H
|
||||
|
||||
#include "periph_cpu.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @name External oscillator and clock configuration
|
||||
*
|
||||
* For selection of the used CORECLOCK, we have implemented two choices:
|
||||
*
|
||||
* - usage of the PLL fed by the internal 8MHz oscillator divided by 8
|
||||
* - usage of the internal 8MHz oscillator directly, divided by N if needed
|
||||
*
|
||||
*
|
||||
* The PLL option allows for the usage of a wider frequency range and a more
|
||||
* stable clock with less jitter. This is why we use this option as default.
|
||||
*
|
||||
* The target frequency is computed from the PLL multiplier and the PLL divisor.
|
||||
* Use the following formula to compute your values:
|
||||
*
|
||||
* CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV
|
||||
*
|
||||
* NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL
|
||||
* frequency is 96MHz. So PLL_MULL must be between 31 and 95!
|
||||
*
|
||||
*
|
||||
* The internal Oscillator used directly can lead to a slightly better power
|
||||
* efficiency to the cost of a less stable clock. Use this option when you know
|
||||
* what you are doing! The actual core frequency is adjusted as follows:
|
||||
*
|
||||
* CORECLOCK = 8MHz / DIV
|
||||
*
|
||||
* NOTE: A core clock frequency below 1MHz is not recommended
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#define CLOCK_USE_PLL (1)
|
||||
|
||||
#if CLOCK_USE_PLL
|
||||
/* edit these values to adjust the PLL output frequency */
|
||||
#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
|
||||
#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
|
||||
/* generate the actual used core clock frequency */
|
||||
#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
|
||||
#else
|
||||
/* edit this value to your needs */
|
||||
#define CLOCK_DIV (1U)
|
||||
/* generate the actual core clock frequency */
|
||||
#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name Timer peripheral configuration
|
||||
* @{
|
||||
*/
|
||||
static const tc32_conf_t timer_config[] = {
|
||||
{ /* Timer 0 - System Clock */
|
||||
.dev = TC3,
|
||||
.irq = TC3_IRQn,
|
||||
.pm_mask = PM_APBCMASK_TC3,
|
||||
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
|
||||
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
|
||||
.gclk_src = GCLK_CLKCTRL_GEN(1),
|
||||
.prescaler = TC_CTRLA_PRESCALER_DIV1,
|
||||
#else
|
||||
.gclk_src = GCLK_CLKCTRL_GEN(0),
|
||||
.prescaler = TC_CTRLA_PRESCALER_DIV8,
|
||||
#endif
|
||||
.flags = TC_CTRLA_MODE_COUNT16,
|
||||
},
|
||||
{ /* Timer 1 */
|
||||
.dev = TC4,
|
||||
.irq = TC4_IRQn,
|
||||
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
|
||||
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
|
||||
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
|
||||
.gclk_src = GCLK_CLKCTRL_GEN(1),
|
||||
.prescaler = TC_CTRLA_PRESCALER_DIV1,
|
||||
#else
|
||||
.gclk_src = GCLK_CLKCTRL_GEN(0),
|
||||
.prescaler = TC_CTRLA_PRESCALER_DIV8,
|
||||
#endif
|
||||
.flags = TC_CTRLA_MODE_COUNT32,
|
||||
}
|
||||
};
|
||||
|
||||
#define TIMER_0_MAX_VALUE 0xffff
|
||||
|
||||
/* interrupt function name mapping */
|
||||
#define TIMER_0_ISR isr_tc3
|
||||
#define TIMER_1_ISR isr_tc4
|
||||
|
||||
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name PWM configuration
|
||||
* @{
|
||||
*/
|
||||
#define PWM_0_EN 1
|
||||
#define PWM_MAX_CHANNELS (2U)
|
||||
/* for compatibility with test application */
|
||||
#define PWM_0_CHANNELS PWM_MAX_CHANNELS
|
||||
|
||||
/* PWM device configuration */
|
||||
static const pwm_conf_t pwm_config[] = {
|
||||
#if PWM_0_EN
|
||||
{TCC0, {
|
||||
/* GPIO pin, MUX value, TCC channel */
|
||||
{ GPIO_PIN(PA, 10), GPIO_MUX_F, 2 }, /* ~2 */
|
||||
{ GPIO_PIN(PA, 11), GPIO_MUX_F, 3 }, /* ~3 */
|
||||
}}
|
||||
#endif
|
||||
};
|
||||
|
||||
/* number of devices that are actually defined */
|
||||
#define PWM_NUMOF ARRAY_SIZE(pwm_config)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name ADC configuration
|
||||
* @{
|
||||
*/
|
||||
#define ADC_0_EN 1
|
||||
#define ADC_MAX_CHANNELS 14
|
||||
/* ADC 0 device configuration */
|
||||
#define ADC_0_DEV ADC
|
||||
#define ADC_0_IRQ ADC_IRQn
|
||||
|
||||
/* ADC 0 Default values */
|
||||
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */
|
||||
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
|
||||
|
||||
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
|
||||
#define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
|
||||
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
|
||||
|
||||
static const adc_conf_chan_t adc_channels[] = {
|
||||
/* port, pin, muxpos */
|
||||
{GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0}, /* A0 */
|
||||
{GPIO_PIN(PB, 2), ADC_INPUTCTRL_MUXPOS_PIN10}, /* A1 */
|
||||
{GPIO_PIN(PB, 3), ADC_INPUTCTRL_MUXPOS_PIN11}, /* A2 */
|
||||
{GPIO_PIN(PA, 4), ADC_INPUTCTRL_MUXPOS_PIN4}, /* A3 */
|
||||
{GPIO_PIN(PA, 5), ADC_INPUTCTRL_MUXPOS_PIN5}, /* A4 */
|
||||
{GPIO_PIN(PA, 6), ADC_INPUTCTRL_MUXPOS_PIN6}, /* A5 */
|
||||
{GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7}, /* A6 */
|
||||
};
|
||||
|
||||
#define ADC_0_CHANNELS (7U)
|
||||
#define ADC_NUMOF ADC_0_CHANNELS
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name I2C configuration
|
||||
* @{
|
||||
*/
|
||||
static const i2c_conf_t i2c_config[] = {
|
||||
{
|
||||
.dev = &(SERCOM0->I2CM),
|
||||
.speed = I2C_SPEED_NORMAL,
|
||||
.scl_pin = GPIO_PIN(PA, 9),
|
||||
.sda_pin = GPIO_PIN(PA, 8),
|
||||
.mux = GPIO_MUX_C,
|
||||
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
|
||||
.flags = I2C_FLAG_NONE
|
||||
}
|
||||
};
|
||||
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name RTC configuration
|
||||
* @{
|
||||
*/
|
||||
#define RTC_NUMOF (1U)
|
||||
#define RTC_DEV RTC->MODE2
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name RTT configuration
|
||||
* @{
|
||||
*/
|
||||
#define RTT_NUMOF (1U)
|
||||
#define RTT_DEV RTC->MODE0
|
||||
#define RTT_IRQ RTC_IRQn
|
||||
#define RTT_IRQ_PRIO 10
|
||||
#define RTT_ISR isr_rtc
|
||||
#define RTT_MAX_VALUE (0xffffffff)
|
||||
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
|
||||
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name USB peripheral configuration
|
||||
* @{
|
||||
*/
|
||||
static const sam0_common_usb_config_t sam_usbdev_config[] = {
|
||||
{
|
||||
.dm = GPIO_PIN(PA, 24),
|
||||
.dp = GPIO_PIN(PA, 25),
|
||||
.d_mux = GPIO_MUX_G,
|
||||
.device = &USB->DEVICE,
|
||||
}
|
||||
};
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PERIPH_CONF_COMMON_H */
|
||||
/** @} */
|
@ -15,7 +15,7 @@ BOARD_INSUFFICIENT_MEMORY := blackpill blackpill-128kib bluepill \
|
||||
nucleo-f302r8 nucleo-f303k8 nucleo-f334r8 \
|
||||
nucleo-f410rb nucleo-l031k6 nucleo-l053r8 \
|
||||
opencm904 spark-core stm32f0discovery \
|
||||
airfy-beacon arduino-mkr1000 \
|
||||
airfy-beacon arduino-mkr1000 arduino-mkrwan1300 \
|
||||
arduino-mkrfox1200 arduino-mkrzero arduino-zero \
|
||||
b-l072z-lrwan1 cc2538dk ek-lm4f120xl feather-m0 \
|
||||
ikea-tradfri limifrog-v1 lobaro-lorabox \
|
||||
|
@ -25,6 +25,7 @@ BOARD_INSUFFICIENT_MEMORY := airfy-beacon \
|
||||
arduino-mega2560 \
|
||||
arduino-mkr1000 \
|
||||
arduino-mkrfox1200 \
|
||||
arduino-mkrwan1300 \
|
||||
arduino-mkrzero \
|
||||
arduino-nano \
|
||||
arduino-uno \
|
||||
|
Loading…
Reference in New Issue
Block a user