RIOT-OS/RIOT
RIOT-OS/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00
Code Releases Activity

boards/hifive1*: apply new UART configuration scheme

Browse Source
This commit is contained in:
Alexandre Abadie 2019-12-05 18:53:41 +01:00
parent e5c64c739a
commit 876824201c
No known key found for this signature in database
GPG Key ID: 1C919A403CAE1405
4 changed files with 51 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
boards/hifive1/board.c
View File

@ -117,12 +117,6 @@ void board_init(void)
cpu_init();
board_init_clock();
/* Configure pin muxing for UART0 */
GPIO_REG(GPIO_OUTPUT_VAL) |= IOF0_UART0_MASK;
GPIO_REG(GPIO_OUTPUT_EN) |= IOF0_UART0_MASK;
GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
/* Configure GPIOs for LEDs */
gpio_init(LED0_PIN, GPIO_OUT);
gpio_init(LED1_PIN, GPIO_OUT);

35
boards/hifive1/include/periph_conf.h
View File

@ -1,5 +1,6 @@
/*
* Copyright (C) 2017 Ken Rabold
* 2019 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
@ -19,6 +20,8 @@
#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -49,6 +52,28 @@ extern "C" {
#define TIMER_NUMOF (1)
/** @} */
/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.addr = UART0_CTRL_ADDR,
.rx = GPIO_PIN(0, 16),
.tx = GPIO_PIN(0, 17),
.isr_num = INT_UART0_BASE,
},
{
.addr = UART1_CTRL_ADDR,
.rx = GPIO_PIN(0, 18),
.tx = GPIO_PIN(0, 23),
.isr_num = INT_UART1_BASE,
},
};
#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */
/**
* @name RTT/RTC configuration
*
@ -76,16 +101,6 @@ extern "C" {
#define PWM_NUMOF (3)
/** @} */
/**
* @name UART configuration
*
* @{
*/
#define UART_NUMOF (2)
#define UART0_RX_INTR_PRIORITY (2)
#define UART1_RX_INTR_PRIORITY (2)
/** @} */
#ifdef __cplusplus
}
#endif

6
boards/hifive1b/board.c
View File

@ -139,12 +139,6 @@ void board_init(void)
board_init_clock();
// board_init_flash();
/* Configure pin muxing for UART0 */
GPIO_REG(GPIO_OUTPUT_VAL) |= IOF0_UART0_MASK;
GPIO_REG(GPIO_OUTPUT_EN) |= IOF0_UART0_MASK;
GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
/* Configure GPIOs for LEDs */
gpio_init(LED0_PIN, GPIO_OUT);
gpio_init(LED1_PIN, GPIO_OUT);

36
boards/hifive1b/include/periph_conf.h
View File

@ -1,5 +1,6 @@
/*
* Copyright (C) 2019 Ken Rabold
* 2019 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
@ -14,11 +15,14 @@
* @brief Peripheral specific definitions for the HiFive1b RISC-V board
*
* @author Ken Rabold
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*/
#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -49,6 +53,28 @@ extern "C" {
#define TIMER_NUMOF (1)
/** @} */
/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.addr = UART0_CTRL_ADDR,
.rx = GPIO_PIN(0, 16),
.tx = GPIO_PIN(0, 17),
.isr_num = INT_UART0_BASE,
},
{
.addr = UART1_CTRL_ADDR,
.rx = GPIO_PIN(0, 18),
.tx = GPIO_PIN(0, 23),
.isr_num = INT_UART1_BASE,
},
};
#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */
/**
* @name RTT/RTC configuration
*
@ -76,16 +102,6 @@ extern "C" {
#define PWM_NUMOF (3)
/** @} */
/**
* @name UART configuration
*
* @{
*/
#define UART_NUMOF (2)
#define UART0_RX_INTR_PRIORITY (2)
#define UART1_RX_INTR_PRIORITY (2)
/** @} */
#ifdef __cplusplus
}
#endif