From 876824201c2d200aa32999a46061a5f7c14aa913 Mon Sep 17 00:00:00 2001
From: Alexandre Abadie <alexandre.abadie@inria.fr>
Date: Thu, 5 Dec 2019 18:53:41 +0100
Subject: [PATCH] boards/hifive1*: apply new UART configuration scheme

---
 boards/hifive1/board.c                |  6 -----
 boards/hifive1/include/periph_conf.h  | 35 ++++++++++++++++++--------
 boards/hifive1b/board.c               |  6 -----
 boards/hifive1b/include/periph_conf.h | 36 +++++++++++++++++++--------
 4 files changed, 51 insertions(+), 32 deletions(-)

diff --git a/boards/hifive1/board.c b/boards/hifive1/board.c
index 42d72ad3f9..68352ed51f 100644
--- a/boards/hifive1/board.c
+++ b/boards/hifive1/board.c
@@ -117,12 +117,6 @@ void board_init(void)
     cpu_init();
     board_init_clock();
 
-    /* Configure pin muxing for UART0 */
-    GPIO_REG(GPIO_OUTPUT_VAL) |= IOF0_UART0_MASK;
-    GPIO_REG(GPIO_OUTPUT_EN) |= IOF0_UART0_MASK;
-    GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
-    GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
-
     /* Configure GPIOs for LEDs */
     gpio_init(LED0_PIN, GPIO_OUT);
     gpio_init(LED1_PIN, GPIO_OUT);
diff --git a/boards/hifive1/include/periph_conf.h b/boards/hifive1/include/periph_conf.h
index 8bc71e52b8..673184fdda 100644
--- a/boards/hifive1/include/periph_conf.h
+++ b/boards/hifive1/include/periph_conf.h
@@ -1,5 +1,6 @@
 /*
  * Copyright (C) 2017 Ken Rabold
+ *               2019 Inria
  *
  * This file is subject to the terms and conditions of the GNU Lesser General
  * Public License v2.1. See the file LICENSE in the top level directory for more
@@ -19,6 +20,8 @@
 #ifndef PERIPH_CONF_H
 #define PERIPH_CONF_H
 
+#include "periph_cpu.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -49,6 +52,28 @@ extern "C" {
 #define TIMER_NUMOF                 (1)
 /** @} */
 
+/**
+ * @name   UART configuration
+ * @{
+ */
+static const uart_conf_t uart_config[] = {
+    {
+        .addr       = UART0_CTRL_ADDR,
+        .rx         = GPIO_PIN(0, 16),
+        .tx         = GPIO_PIN(0, 17),
+        .isr_num    = INT_UART0_BASE,
+    },
+    {
+        .addr       = UART1_CTRL_ADDR,
+        .rx         = GPIO_PIN(0, 18),
+        .tx         = GPIO_PIN(0, 23),
+        .isr_num    = INT_UART1_BASE,
+    },
+};
+
+#define UART_NUMOF                  ARRAY_SIZE(uart_config)
+/** @} */
+
 /**
  * @name    RTT/RTC configuration
  *
@@ -76,16 +101,6 @@ extern "C" {
 #define PWM_NUMOF                   (3)
 /** @} */
 
-/**
- * @name    UART configuration
- *
- * @{
- */
-#define UART_NUMOF                  (2)
-#define UART0_RX_INTR_PRIORITY      (2)
-#define UART1_RX_INTR_PRIORITY      (2)
-/** @} */
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/boards/hifive1b/board.c b/boards/hifive1b/board.c
index 0aaf3471a1..b16b00d7ea 100644
--- a/boards/hifive1b/board.c
+++ b/boards/hifive1b/board.c
@@ -139,12 +139,6 @@ void board_init(void)
     board_init_clock();
   //  board_init_flash();
 
-    /* Configure pin muxing for UART0 */
-    GPIO_REG(GPIO_OUTPUT_VAL) |= IOF0_UART0_MASK;
-    GPIO_REG(GPIO_OUTPUT_EN) |= IOF0_UART0_MASK;
-    GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
-    GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
-
     /* Configure GPIOs for LEDs */
     gpio_init(LED0_PIN, GPIO_OUT);
     gpio_init(LED1_PIN, GPIO_OUT);
diff --git a/boards/hifive1b/include/periph_conf.h b/boards/hifive1b/include/periph_conf.h
index a38247f808..53986a311a 100644
--- a/boards/hifive1b/include/periph_conf.h
+++ b/boards/hifive1b/include/periph_conf.h
@@ -1,5 +1,6 @@
 /*
  * Copyright (C) 2019 Ken Rabold
+ *               2019 Inria
  *
  * This file is subject to the terms and conditions of the GNU Lesser General
  * Public License v2.1. See the file LICENSE in the top level directory for more
@@ -14,11 +15,14 @@
  * @brief       Peripheral specific definitions for the HiFive1b RISC-V board
  *
  * @author      Ken Rabold
+ * @author      Alexandre Abadie <alexandre.abadie@inria.fr>
  */
 
 #ifndef PERIPH_CONF_H
 #define PERIPH_CONF_H
 
+#include "periph_cpu.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -49,6 +53,28 @@ extern "C" {
 #define TIMER_NUMOF                 (1)
 /** @} */
 
+/**
+ * @name   UART configuration
+ * @{
+ */
+static const uart_conf_t uart_config[] = {
+    {
+        .addr       = UART0_CTRL_ADDR,
+        .rx         = GPIO_PIN(0, 16),
+        .tx         = GPIO_PIN(0, 17),
+        .isr_num    = INT_UART0_BASE,
+    },
+    {
+        .addr       = UART1_CTRL_ADDR,
+        .rx         = GPIO_PIN(0, 18),
+        .tx         = GPIO_PIN(0, 23),
+        .isr_num    = INT_UART1_BASE,
+    },
+};
+
+#define UART_NUMOF                  ARRAY_SIZE(uart_config)
+/** @} */
+
 /**
  * @name    RTT/RTC configuration
  *
@@ -76,16 +102,6 @@ extern "C" {
 #define PWM_NUMOF                   (3)
 /** @} */
 
-/**
- * @name    UART configuration
- *
- * @{
- */
-#define UART_NUMOF                  (2)
-#define UART0_RX_INTR_PRIORITY      (2)
-#define UART1_RX_INTR_PRIORITY      (2)
-/** @} */
-
 #ifdef __cplusplus
 }
 #endif