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boards: use SAM0_GCLK_TIMER for saml21 boards
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@ -48,7 +48,7 @@ static const tc32_conf_t timer_config[] = {
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.mclk = &MCLK->APBCMASK.reg,
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.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
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.gclk_id = TC0_GCLK_ID,
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.gclk_src = SAM0_GCLK_8MHZ,
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.gclk_src = SAM0_GCLK_TIMER,
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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@ -51,7 +51,7 @@ static const tc32_conf_t timer_config[] = {
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.mclk = &MCLK->APBCMASK.reg,
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.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
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.gclk_id = TC0_GCLK_ID,
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.gclk_src = SAM0_GCLK_8MHZ,
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.gclk_src = SAM0_GCLK_TIMER,
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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@ -124,7 +124,7 @@ static const pwm_conf_t pwm_config[] = {
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{ .tim = TCC_CONFIG(TCC0),
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.chan = pwm_chan0_config,
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.chan_numof = ARRAY_SIZE(pwm_chan0_config),
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.gclk_src = SAM0_GCLK_8MHZ,
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.gclk_src = SAM0_GCLK_TIMER,
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},
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#endif
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};
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@ -222,7 +222,7 @@ static const adc_conf_chan_t adc_channels[] = {
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* @{
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*/
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/* Must not exceed 12 MHz */
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#define DAC_CLOCK SAM0_GCLK_8MHZ
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#define DAC_CLOCK SAM0_GCLK_TIMER
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/* use Vcc as reference voltage */
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#define DAC_VREF DAC_CTRLB_REFSEL_VDDANA
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/** @} */
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@ -41,7 +41,7 @@ static const tc32_conf_t timer_config[] = {
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.mclk = &MCLK->APBCMASK.reg,
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.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
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.gclk_id = TC0_GCLK_ID,
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.gclk_src = SAM0_GCLK_8MHZ,
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.gclk_src = SAM0_GCLK_TIMER,
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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@ -48,7 +48,7 @@ static const tc32_conf_t timer_config[] = {
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.mclk = &MCLK->APBCMASK.reg,
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.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
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.gclk_id = TC0_GCLK_ID,
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.gclk_src = SAM0_GCLK_8MHZ,
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.gclk_src = SAM0_GCLK_TIMER,
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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@ -48,7 +48,7 @@ static const tc32_conf_t timer_config[] = {
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.mclk = &MCLK->APBCMASK.reg,
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.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
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.gclk_id = TC0_GCLK_ID,
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.gclk_src = SAM0_GCLK_8MHZ,
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.gclk_src = SAM0_GCLK_TIMER,
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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