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cpu/samd5x: add support for FDPLL1 running at 200MHz

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Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
This commit is contained in:
Dylan Laduranty 2023-05-16 16:04:17 +02:00
parent f790d9fe36
commit 6607ed10f6
2 changed files with 8 additions and 1 deletions
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8
cpu/samd5x/cpu.c
View File

@ -254,7 +254,11 @@ void sam0_gclk_enable(uint8_t id)
} else if (USE_XOSC) {
gclk_connect(SAM0_GCLK_PERIPH, GCLK_SOURCE_ACTIVE_XOSC, 0);
}
break;
case SAM0_GCLK_200MHZ:
fdpll_init_nolock(1, MHZ(200), OSCCTRL_DPLLCTRLA_ONDEMAND);
gclk_connect(SAM0_GCLK_200MHZ, GCLK_SOURCE_DPLL1, 0);
fdpll_lock(1);
break;
}
}
@ -277,6 +281,8 @@ uint32_t sam0_gclk_freq(uint8_t id)
assert(0);
return 0;
}
case SAM0_GCLK_200MHZ:
return MHZ(200);
default:
return 0;
}

1
cpu/samd5x/include/periph_cpu.h
View File

@ -65,6 +65,7 @@ enum {
SAM0_GCLK_32KHZ, /**< 32 kHz clock */
SAM0_GCLK_TIMER, /**< 4-8 MHz clock for xTimer */
SAM0_GCLK_PERIPH, /**< 12-48 MHz (DFLL) clock */
SAM0_GCLK_200MHZ, /**< 200MHz FDPLL clock */
};
/** @} */