From 6607ed10f626a03d1a0f9f3dff4724b3c2f895c7 Mon Sep 17 00:00:00 2001 From: Dylan Laduranty Date: Tue, 16 May 2023 16:04:17 +0200 Subject: [PATCH] cpu/samd5x: add support for FDPLL1 running at 200MHz Signed-off-by: Dylan Laduranty --- cpu/samd5x/cpu.c | 8 +++++++- cpu/samd5x/include/periph_cpu.h | 1 + 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/cpu/samd5x/cpu.c b/cpu/samd5x/cpu.c index 7cb972e6ac..0daf4665a3 100644 --- a/cpu/samd5x/cpu.c +++ b/cpu/samd5x/cpu.c @@ -254,7 +254,11 @@ void sam0_gclk_enable(uint8_t id) } else if (USE_XOSC) { gclk_connect(SAM0_GCLK_PERIPH, GCLK_SOURCE_ACTIVE_XOSC, 0); } - + break; + case SAM0_GCLK_200MHZ: + fdpll_init_nolock(1, MHZ(200), OSCCTRL_DPLLCTRLA_ONDEMAND); + gclk_connect(SAM0_GCLK_200MHZ, GCLK_SOURCE_DPLL1, 0); + fdpll_lock(1); break; } } @@ -277,6 +281,8 @@ uint32_t sam0_gclk_freq(uint8_t id) assert(0); return 0; } + case SAM0_GCLK_200MHZ: + return MHZ(200); default: return 0; } diff --git a/cpu/samd5x/include/periph_cpu.h b/cpu/samd5x/include/periph_cpu.h index acae8fddca..09d0493de9 100644 --- a/cpu/samd5x/include/periph_cpu.h +++ b/cpu/samd5x/include/periph_cpu.h @@ -65,6 +65,7 @@ enum { SAM0_GCLK_32KHZ, /**< 32 kHz clock */ SAM0_GCLK_TIMER, /**< 4-8 MHz clock for xTimer */ SAM0_GCLK_PERIPH, /**< 12-48 MHz (DFLL) clock */ + SAM0_GCLK_200MHZ, /**< 200MHz FDPLL clock */ }; /** @} */