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Merge pull request #15149 from benpicco/cpu/samd21-gclk7

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cpu/samd21: improve GCLK7 magic
This commit is contained in:
Marian Buschsieweke 2020-11-03 18:14:09 +01:00 committed by GitHub
commit 60802f864a
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3 changed files with 4 additions and 3 deletions
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2
cpu/sam0_common/periph/pwm.c
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@ -205,7 +205,7 @@ static void poweroff(pwm_t dev)
*cfg->tim.mclk &= ~cfg->tim.mclk_mask;
#else
PM->APBCMASK.reg &= ~cfg->tim.pm_mask;
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_GEN_GCLK7
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_GEN(SAM0_GCLK_DISABLED)
| GCLK_CLKCTRL_ID(cfg->tim.gclk_id);
#endif
}

4
cpu/samd21/cpu.c
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@ -252,8 +252,8 @@ static void clk_init(void)
#endif
/* redirect all peripherals to a disabled clock generator (7) by default */
for (int i = 0x3; i <= 0x22; i++) {
GCLK->CLKCTRL.reg = ( GCLK_CLKCTRL_ID(i) | GCLK_CLKCTRL_GEN_GCLK7 );
for (unsigned i = 0x3; i <= GCLK_CLKCTRL_ID_Msk; i++) {
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(i) | GCLK_CLKCTRL_GEN(SAM0_GCLK_DISABLED);
while (GCLK->STATUS.bit.SYNCBUSY) {}
}
}

1
cpu/samd21/include/periph_cpu.h
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@ -60,6 +60,7 @@ enum {
SAM0_GCLK_1MHZ, /**< 1 MHz clock for xTimer */
SAM0_GCLK_32KHZ, /**< 32 kHz clock */
SAM0_GCLK_1KHZ, /**< 1 kHz clock */
SAM0_GCLK_DISABLED = 0xF, /**< disabled GCLK */
};
/** @} */