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Code Releases Activity

boards: Harmonized UART config of Nucleo-64 boards

Browse Source 
- nucleo-f334r8:
  - Added USART1 and USART3 config
- nucleo-f401re:
  - Changed order of UARTs to match the other boards
- nucleo-f410rb:
  - Added USART6 configuration
  - Fixed incorrect DMA settings (according to reference manual of the MCU)
- nucleo-f446re:
  - Changed order of UARTs to match the other boards
- nucleo-l152re:
  - Changed order of UARTs to match the other boards

The result of this harmonization is, that the first UART is always USART2, the
other USARTs are added in ascending order.
This commit is contained in:
Marian Buschsieweke 2018-08-15 10:03:22 +02:00
parent e7b554bad2
commit 5a3326350b
No known key found for this signature in database
GPG Key ID: 61F64C6599B1539F
5 changed files with 86 additions and 48 deletions
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22
boards/nucleo-f334r8/include/periph_conf.h
View File

@ -90,10 +90,32 @@ static const uart_conf_t uart_config[] = {
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn
},
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB2,
.irqn = USART1_IRQn
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_B, 11),
.tx_pin = GPIO_PIN(PORT_B, 10),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn
}
};
#define UART_0_ISR (isr_usart2)
#define UART_1_ISR (isr_usart1)
#define UART_2_ISR (isr_usart3)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */

32
boards/nucleo-f401re/include/periph_conf.h
View File

@ -94,20 +94,6 @@ static const uart_conf_t uart_config[] = {
#ifdef UART_USE_DMA
.dma_stream = 6,
.dma_chan = 4
#endif
},
{
.dev = USART6,
.rcc_mask = RCC_APB2ENR_USART6EN,
.rx_pin = GPIO_PIN(PORT_A, 12),
.tx_pin = GPIO_PIN(PORT_A, 11),
.rx_af = GPIO_AF8,
.tx_af = GPIO_AF8,
.bus = APB2,
.irqn = USART6_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 6,
.dma_chan = 4
#endif
},
{
@ -122,15 +108,29 @@ static const uart_conf_t uart_config[] = {
#ifdef UART_USE_DMA
.dma_stream = 6,
.dma_chan = 4
#endif
},
{
.dev = USART6,
.rcc_mask = RCC_APB2ENR_USART6EN,
.rx_pin = GPIO_PIN(PORT_A, 12),
.tx_pin = GPIO_PIN(PORT_A, 11),
.rx_af = GPIO_AF8,
.tx_af = GPIO_AF8,
.bus = APB2,
.irqn = USART6_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 6,
.dma_chan = 4
#endif
}
};
#define UART_0_ISR (isr_usart2)
#define UART_0_DMA_ISR (isr_dma1_stream6)
#define UART_1_ISR (isr_usart6)
#define UART_1_ISR (isr_usart1)
#define UART_1_DMA_ISR (isr_dma1_stream6)
#define UART_2_ISR (isr_usart1)
#define UART_2_ISR (isr_usart6)
#define UART_2_DMA_ISR (isr_dma1_stream6)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))

20
boards/nucleo-f410rb/include/periph_conf.h
View File

@ -106,8 +106,22 @@ static const uart_conf_t uart_config[] = {
.bus = APB2,
.irqn = USART1_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 5,
.dma_stream = 7,
.dma_chan = 4
#endif
},
{
.dev = USART6,
.rcc_mask = RCC_APB2ENR_USART6EN,
.rx_pin = GPIO_PIN(PORT_A, 12),
.tx_pin = GPIO_PIN(PORT_A, 11),
.rx_af = GPIO_AF8,
.tx_af = GPIO_AF8,
.bus = APB2,
.irqn = USART6_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 7,
.dma_chan = 5
#endif
}
};
@ -116,7 +130,9 @@ static const uart_conf_t uart_config[] = {
#define UART_0_ISR (isr_usart2)
#define UART_0_DMA_ISR (isr_dma1_stream6)
#define UART_1_ISR (isr_usart1)
#define UART_1_DMA_ISR (isr_dma1_stream5)
#define UART_1_DMA_ISR (isr_dma2_stream7)
#define UART_2_ISR (isr_usart6)
#define UART_2_DMA_ISR (isr_dma2_stream7)
/* deduct number of defined UART interfaces */
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))

36
boards/nucleo-f446re/include/periph_conf.h
View File

@ -65,20 +65,6 @@ static const uart_conf_t uart_config[] = {
#ifdef UART_USE_DMA
.dma_stream = 6,
.dma_chan = 4
#endif
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_C, 11),
.tx_pin = GPIO_PIN(PORT_C, 10),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 5,
.dma_chan = 4
#endif
},
{
@ -93,16 +79,30 @@ static const uart_conf_t uart_config[] = {
#ifdef UART_USE_DMA
.dma_stream = 4,
.dma_chan = 4
#endif
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_C, 11),
.tx_pin = GPIO_PIN(PORT_C, 10),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 5,
.dma_chan = 4
#endif
},
};
#define UART_0_ISR (isr_usart2)
#define UART_0_DMA_ISR (isr_dma1_stream6)
#define UART_1_ISR (isr_usart3)
#define UART_1_DMA_ISR (isr_dma1_stream5)
#define UART_2_ISR (isr_usart1)
#define UART_2_DMA_ISR (isr_dma1_stream4)
#define UART_1_ISR (isr_usart1)
#define UART_1_DMA_ISR (isr_dma1_stream4)
#define UART_2_ISR (isr_usart3)
#define UART_2_DMA_ISR (isr_dma1_stream5)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */

24
boards/nucleo-l152re/include/periph_conf.h
View File

@ -103,16 +103,6 @@ static const uart_conf_t uart_config[] = {
.bus = APB1,
.irqn = USART2_IRQn
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_C, 11),
.tx_pin = GPIO_PIN(PORT_C, 10),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn
},
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
@ -123,11 +113,21 @@ static const uart_conf_t uart_config[] = {
.bus = APB2,
.irqn = USART1_IRQn
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_C, 11),
.tx_pin = GPIO_PIN(PORT_C, 10),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn
},
};
#define UART_0_ISR (isr_usart2)
#define UART_1_ISR (isr_usart3)
#define UART_2_ISR (isr_usart1)
#define UART_1_ISR (isr_usart1)
#define UART_2_ISR (isr_usart3)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */