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https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
boards: Remove PLL overrides in kconfig
Since we know the HSE speed, manual overrides are not needed anymore
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28aed3cb97
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464f57b4a3
@ -27,9 +27,8 @@ config BOARD_COMMON_IOTLAB
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select HAVE_L3G4200D
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select HAVE_LSM303DLHC
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_16MHZ
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endchoice
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config CLOCK_HSE
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default 16000000
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config MODULE_BOARDS_COMMON_IOTLAB
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bool
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@ -11,6 +11,3 @@ FEATURES_PROVIDED += periph_uart
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# Put other features for this board (in alphabetical order)
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FEATURES_PROVIDED += riotboot
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# iotlab boards provide a custom default Kconfig clock configuration
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KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/common/iotlab/clock.config
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@ -1,4 +0,0 @@
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# iotlab based boards provide a 16MHz HSE so they need a predivider of 2
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# to remain with a 72MHz sysclk by default.
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CONFIG_CUSTOM_PLL_PARAMS=y
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CONFIG_CLOCK_PLL_PREDIV=2
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@ -28,9 +28,8 @@ config BOARD_COMMON_WEACT_F4X1CX
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select HAVE_SAUL_GPIO
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select HAVE_MTD_SPI_NOR
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_25MHZ
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endchoice
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config CLOCK_HSE
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default 25000000
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config MODULE_BOARDS_COMMON_WEACT-F4X1CX
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bool
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@ -14,8 +14,6 @@ FEATURES_PROVIDED += periph_usbdev
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FEATURES_PROVIDED += highlevel_stdio
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FEATURES_PROVIDED += tinyusb_device
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# weact-f4x1cx boards provide a custom default Kconfig clock configuration
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KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/common/weact-f4x1cx/clock.config
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# This configuration enables modules that are only available when using Kconfig
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# module modelling
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@ -1,4 +0,0 @@
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# weact-f4x1cx based boards provide a 25MHz HSE so they need a custom PLL config
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# to output a 48MHz clock for USB.
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CONFIG_CUSTOM_PLL_PARAMS=y
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CONFIG_CLOCK_PLL_M=25
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@ -21,9 +21,8 @@ config BOARD_F4VI1
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select BOARD_HAS_HSE
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select BOARD_HAS_LSE
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_16MHZ
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endchoice
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config CLOCK_HSE
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default 16000000
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config CLOCK_PLL_M
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default 16
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@ -25,8 +25,7 @@ config BOARD_IM880B
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select BOARD_HAS_HSE
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select BOARD_HAS_LSE
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_16MHZ
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endchoice
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config CLOCK_HSE
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default 16000000
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source "$(RIOTBOARD)/common/stm32/Kconfig"
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@ -33,9 +33,8 @@ config BOARD_LORA_E5_DEV
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select HAVE_SAUL_GPIO
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select HAVE_LM75A
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_32MHZ
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endchoice
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config CLOCK_HSE
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default 32000000
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config LORA_E5_DEV_ENABLE_3P3V
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bool "LoRa-E5 Development Kit - Enable 3.3V output"
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@ -30,9 +30,8 @@ config BOARD_MSBIOT
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select HAVE_MPU9150
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select HAVE_SAUL_GPIO
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_16MHZ
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endchoice
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config CLOCK_HSE
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default 16000000
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config CLOCK_PLL_M
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default 16
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@ -28,8 +28,7 @@ config BOARD_NUCLEO_WL55JC
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select MODULE_PERIPH_LPUART if MODULE_STDIO_UART && HAS_PERIPH_LPUART
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_32MHZ
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endchoice
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config CLOCK_HSE
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default 32000000
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source "$(RIOTBOARD)/common/nucleo64/Kconfig"
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@ -33,8 +33,7 @@ config BOARD_P_NUCLEO_WB55
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select BOARD_HAS_HSE
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select BOARD_HAS_LSE
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_32MHZ
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endchoice
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config CLOCK_HSE
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default 32000000
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source "$(RIOTBOARD)/common/nucleo/Kconfig"
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@ -31,9 +31,8 @@ config BOARD_PYBOARD
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select HAVE_SAUL_GPIO
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_12MHZ
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endchoice
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config CLOCK_HSE
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default 12000000
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config CLOCK_PLL_M
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default 12
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@ -27,8 +27,7 @@ config BOARD_STM32F469I_DISCO
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select HAVE_SAUL_GPIO
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_8MHZ
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endchoice
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config CLOCK_HSE
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default 8000000
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source "$(RIOTBOARD)/common/stm32/Kconfig"
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@ -37,9 +37,8 @@ config BOARD_STM32F723E_DISCO
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# Workaround due to stdout only working with stdin enabled
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select MODULE_STDIN if TEST_KCONFIG
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_25MHZ
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endchoice
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config CLOCK_HSE
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default 25000000
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config MODULE_PERIPH_INIT_LED0
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default n if MODULE_PERIPH_SPI
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@ -15,6 +15,3 @@ FEATURES_PROVIDED += periph_usbdev_hs_utmi
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# Put other features for this board (in alphabetical order)
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FEATURES_PROVIDED += tinyusb_device
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# stm32f723e-disco provides a custom default Kconfig clock configuration
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KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/stm32f723e-disco/clock.config
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@ -1,5 +0,0 @@
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# stm32f723e-disco provides a 25MHz HSE so they need a custom PLL config
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# to remain in 216MHz max clock.
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CONFIG_CUSTOM_PLL_PARAMS=y
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CONFIG_CLOCK_PLL_M=25
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CONFIG_CLOCK_PLL_N=432
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@ -35,9 +35,8 @@ config BOARD_STM32F746G_DISCO
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select HAVE_FT5X06
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_25MHZ
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endchoice
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config CLOCK_HSE
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default 25000000
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source "$(RIOTBOARD)/common/stm32/Kconfig"
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@ -1,5 +0,0 @@
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# stm32f746g-disco provides a 25MHz HSE so they need a custom PLL config
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# to remain in 216MHz max clock.
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CONFIG_CUSTOM_PLL_PARAMS=y
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CONFIG_CLOCK_PLL_M=25
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CONFIG_CLOCK_PLL_N=432
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@ -11,6 +11,3 @@ FEATURES_PROVIDED += periph_uart
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FEATURES_PROVIDED += periph_usbdev
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FEATURES_PROVIDED += periph_usbdev_hs_ulpi
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FEATURES_PROVIDED += tinyusb_device
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# stm32f746g-disco provides a custom default Kconfig clock configuration
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KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/stm32f746g-disco/clock.config
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@ -34,8 +34,7 @@ config BOARD_STM32F7508_DK
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select HAVE_STM32_ETH
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select HAVE_FT5X06
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_25MHZ
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endchoice
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config CLOCK_HSE
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default 25000000
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source "$(RIOTBOARD)/common/stm32/Kconfig"
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@ -30,9 +30,8 @@ config BOARD_STM32F769I_DISCO
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select HAVE_SAUL_GPIO
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_25MHZ
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endchoice
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config CLOCK_HSE
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default 25000000
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source "$(RIOTBOARD)/common/stm32/Kconfig"
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@ -10,6 +10,3 @@ FEATURES_PROVIDED += periph_usbdev
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# Put other features for this board (in alphabetical order)
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FEATURES_PROVIDED += tinyusb_device
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# stm32f769i-disco provides a custom default Kconfig clock configuration
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KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/stm32f769i-disco/clock.config
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@ -1,5 +0,0 @@
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# stm32f769i-disco provides a 25MHz HSE so they need a custom PLL config
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# to remain in 216MHz max clock.
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CONFIG_CUSTOM_PLL_PARAMS=y
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CONFIG_CLOCK_PLL_M=25
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CONFIG_CLOCK_PLL_N=432
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@ -30,8 +30,7 @@ config BOARD_UBLOX_C030_U201
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select HAVE_SAUL_GPIO
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select MODULE_PERIPH_UART_HW_FC if TEST_KCONFIG && HAS_PERIPH_UART_HW_FC
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choice CHOICE_CLOCK_HSE
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default CLOCK_HSE_12MHZ
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endchoice
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config CLOCK_HSE
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default 12000000
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source "$(RIOTBOARD)/common/stm32/Kconfig"
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@ -10,6 +10,3 @@ FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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FEATURES_PROVIDED += periph_uart_hw_fc
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# ublox-c030-u201 provides a custom default Kconfig clock configuration
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KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/ublox-c030-u201/clock.config
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@ -1,5 +0,0 @@
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# ublox-c030-u201 provides a 12MHz HSE so its needs a custom PLL config to
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# output a 180MHz clock.
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CONFIG_CUSTOM_PLL_PARAMS=y
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CONFIG_CLOCK_PLL_M=12
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CONFIG_CLOCK_PLL_N=360
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@ -1,6 +1,3 @@
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CPU_MODEL = stm32f401cc
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include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.features
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# weact-f401cc provides a custom default Kconfig clock configuration
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KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/weact-f401cc/clock.config
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@ -1 +0,0 @@
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CONFIG_CLOCK_PLL_N=336
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@ -1,6 +1,3 @@
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CPU_MODEL = stm32f401ce
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include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.features
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# weact-f401ce provides a custom default Kconfig clock configuration
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KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/weact-f401ce/clock.config
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@ -1 +0,0 @@
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CONFIG_CLOCK_PLL_N=336
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@ -1,6 +1,3 @@
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CPU_MODEL = stm32f411ce
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include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.features
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# weact-f411ce provides a custom default Kconfig clock configuration
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KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/weact-f411ce/clock.config
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@ -1 +0,0 @@
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CONFIG_CLOCK_PLL_N=192
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