1
0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00

boards: Remove PLL overrides in kconfig

Since we know the HSE speed, manual overrides are not needed anymore
This commit is contained in:
MrKevinWeiss 2022-10-26 11:57:02 +02:00
parent 28aed3cb97
commit 464f57b4a3
No known key found for this signature in database
GPG Key ID: 4B69974722CBEEAE
33 changed files with 30 additions and 102 deletions

View File

@ -27,9 +27,8 @@ config BOARD_COMMON_IOTLAB
select HAVE_L3G4200D
select HAVE_LSM303DLHC
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_16MHZ
endchoice
config CLOCK_HSE
default 16000000
config MODULE_BOARDS_COMMON_IOTLAB
bool

View File

@ -11,6 +11,3 @@ FEATURES_PROVIDED += periph_uart
# Put other features for this board (in alphabetical order)
FEATURES_PROVIDED += riotboot
# iotlab boards provide a custom default Kconfig clock configuration
KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/common/iotlab/clock.config

View File

@ -1,4 +0,0 @@
# iotlab based boards provide a 16MHz HSE so they need a predivider of 2
# to remain with a 72MHz sysclk by default.
CONFIG_CUSTOM_PLL_PARAMS=y
CONFIG_CLOCK_PLL_PREDIV=2

View File

@ -28,9 +28,8 @@ config BOARD_COMMON_WEACT_F4X1CX
select HAVE_SAUL_GPIO
select HAVE_MTD_SPI_NOR
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_25MHZ
endchoice
config CLOCK_HSE
default 25000000
config MODULE_BOARDS_COMMON_WEACT-F4X1CX
bool

View File

@ -14,8 +14,6 @@ FEATURES_PROVIDED += periph_usbdev
FEATURES_PROVIDED += highlevel_stdio
FEATURES_PROVIDED += tinyusb_device
# weact-f4x1cx boards provide a custom default Kconfig clock configuration
KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/common/weact-f4x1cx/clock.config
# This configuration enables modules that are only available when using Kconfig
# module modelling

View File

@ -1,4 +0,0 @@
# weact-f4x1cx based boards provide a 25MHz HSE so they need a custom PLL config
# to output a 48MHz clock for USB.
CONFIG_CUSTOM_PLL_PARAMS=y
CONFIG_CLOCK_PLL_M=25

View File

@ -21,9 +21,8 @@ config BOARD_F4VI1
select BOARD_HAS_HSE
select BOARD_HAS_LSE
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_16MHZ
endchoice
config CLOCK_HSE
default 16000000
config CLOCK_PLL_M
default 16

View File

@ -25,8 +25,7 @@ config BOARD_IM880B
select BOARD_HAS_HSE
select BOARD_HAS_LSE
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_16MHZ
endchoice
config CLOCK_HSE
default 16000000
source "$(RIOTBOARD)/common/stm32/Kconfig"

View File

@ -33,9 +33,8 @@ config BOARD_LORA_E5_DEV
select HAVE_SAUL_GPIO
select HAVE_LM75A
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_32MHZ
endchoice
config CLOCK_HSE
default 32000000
config LORA_E5_DEV_ENABLE_3P3V
bool "LoRa-E5 Development Kit - Enable 3.3V output"

View File

@ -30,9 +30,8 @@ config BOARD_MSBIOT
select HAVE_MPU9150
select HAVE_SAUL_GPIO
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_16MHZ
endchoice
config CLOCK_HSE
default 16000000
config CLOCK_PLL_M
default 16

View File

@ -28,8 +28,7 @@ config BOARD_NUCLEO_WL55JC
select MODULE_PERIPH_LPUART if MODULE_STDIO_UART && HAS_PERIPH_LPUART
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_32MHZ
endchoice
config CLOCK_HSE
default 32000000
source "$(RIOTBOARD)/common/nucleo64/Kconfig"

View File

@ -33,8 +33,7 @@ config BOARD_P_NUCLEO_WB55
select BOARD_HAS_HSE
select BOARD_HAS_LSE
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_32MHZ
endchoice
config CLOCK_HSE
default 32000000
source "$(RIOTBOARD)/common/nucleo/Kconfig"

View File

@ -31,9 +31,8 @@ config BOARD_PYBOARD
select HAVE_SAUL_GPIO
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_12MHZ
endchoice
config CLOCK_HSE
default 12000000
config CLOCK_PLL_M
default 12

View File

@ -27,8 +27,7 @@ config BOARD_STM32F469I_DISCO
select HAVE_SAUL_GPIO
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_8MHZ
endchoice
config CLOCK_HSE
default 8000000
source "$(RIOTBOARD)/common/stm32/Kconfig"

View File

@ -37,9 +37,8 @@ config BOARD_STM32F723E_DISCO
# Workaround due to stdout only working with stdin enabled
select MODULE_STDIN if TEST_KCONFIG
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_25MHZ
endchoice
config CLOCK_HSE
default 25000000
config MODULE_PERIPH_INIT_LED0
default n if MODULE_PERIPH_SPI

View File

@ -15,6 +15,3 @@ FEATURES_PROVIDED += periph_usbdev_hs_utmi
# Put other features for this board (in alphabetical order)
FEATURES_PROVIDED += tinyusb_device
# stm32f723e-disco provides a custom default Kconfig clock configuration
KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/stm32f723e-disco/clock.config

View File

@ -1,5 +0,0 @@
# stm32f723e-disco provides a 25MHz HSE so they need a custom PLL config
# to remain in 216MHz max clock.
CONFIG_CUSTOM_PLL_PARAMS=y
CONFIG_CLOCK_PLL_M=25
CONFIG_CLOCK_PLL_N=432

View File

@ -35,9 +35,8 @@ config BOARD_STM32F746G_DISCO
select HAVE_FT5X06
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_25MHZ
endchoice
config CLOCK_HSE
default 25000000
source "$(RIOTBOARD)/common/stm32/Kconfig"

View File

@ -1,5 +0,0 @@
# stm32f746g-disco provides a 25MHz HSE so they need a custom PLL config
# to remain in 216MHz max clock.
CONFIG_CUSTOM_PLL_PARAMS=y
CONFIG_CLOCK_PLL_M=25
CONFIG_CLOCK_PLL_N=432

View File

@ -11,6 +11,3 @@ FEATURES_PROVIDED += periph_uart
FEATURES_PROVIDED += periph_usbdev
FEATURES_PROVIDED += periph_usbdev_hs_ulpi
FEATURES_PROVIDED += tinyusb_device
# stm32f746g-disco provides a custom default Kconfig clock configuration
KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/stm32f746g-disco/clock.config

View File

@ -34,8 +34,7 @@ config BOARD_STM32F7508_DK
select HAVE_STM32_ETH
select HAVE_FT5X06
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_25MHZ
endchoice
config CLOCK_HSE
default 25000000
source "$(RIOTBOARD)/common/stm32/Kconfig"

View File

@ -30,9 +30,8 @@ config BOARD_STM32F769I_DISCO
select HAVE_SAUL_GPIO
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_25MHZ
endchoice
config CLOCK_HSE
default 25000000
source "$(RIOTBOARD)/common/stm32/Kconfig"

View File

@ -10,6 +10,3 @@ FEATURES_PROVIDED += periph_usbdev
# Put other features for this board (in alphabetical order)
FEATURES_PROVIDED += tinyusb_device
# stm32f769i-disco provides a custom default Kconfig clock configuration
KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/stm32f769i-disco/clock.config

View File

@ -1,5 +0,0 @@
# stm32f769i-disco provides a 25MHz HSE so they need a custom PLL config
# to remain in 216MHz max clock.
CONFIG_CUSTOM_PLL_PARAMS=y
CONFIG_CLOCK_PLL_M=25
CONFIG_CLOCK_PLL_N=432

View File

@ -30,8 +30,7 @@ config BOARD_UBLOX_C030_U201
select HAVE_SAUL_GPIO
select MODULE_PERIPH_UART_HW_FC if TEST_KCONFIG && HAS_PERIPH_UART_HW_FC
choice CHOICE_CLOCK_HSE
default CLOCK_HSE_12MHZ
endchoice
config CLOCK_HSE
default 12000000
source "$(RIOTBOARD)/common/stm32/Kconfig"

View File

@ -10,6 +10,3 @@ FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
FEATURES_PROVIDED += periph_uart_hw_fc
# ublox-c030-u201 provides a custom default Kconfig clock configuration
KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/ublox-c030-u201/clock.config

View File

@ -1,5 +0,0 @@
# ublox-c030-u201 provides a 12MHz HSE so its needs a custom PLL config to
# output a 180MHz clock.
CONFIG_CUSTOM_PLL_PARAMS=y
CONFIG_CLOCK_PLL_M=12
CONFIG_CLOCK_PLL_N=360

View File

@ -1,6 +1,3 @@
CPU_MODEL = stm32f401cc
include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.features
# weact-f401cc provides a custom default Kconfig clock configuration
KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/weact-f401cc/clock.config

View File

@ -1 +0,0 @@
CONFIG_CLOCK_PLL_N=336

View File

@ -1,6 +1,3 @@
CPU_MODEL = stm32f401ce
include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.features
# weact-f401ce provides a custom default Kconfig clock configuration
KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/weact-f401ce/clock.config

View File

@ -1 +0,0 @@
CONFIG_CLOCK_PLL_N=336

View File

@ -1,6 +1,3 @@
CPU_MODEL = stm32f411ce
include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.features
# weact-f411ce provides a custom default Kconfig clock configuration
KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/weact-f411ce/clock.config

View File

@ -1 +0,0 @@
CONFIG_CLOCK_PLL_N=192