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Merge pull request #6810 from gebart/pr/mulle-hwcs

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mulle: Configure hardware CS for all on-board SPI slaves
This commit is contained in:
Vincent Dupont 2017-03-30 11:26:22 +02:00 committed by GitHub
commit 3af13e70ee
2 changed files with 5 additions and 5 deletions
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4
boards/mulle/include/board.h
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@ -111,7 +111,7 @@ void board_init(void);
*/ */
#define AT86RF2XX_PARAMS_BOARD {.spi = SPI_DEV(0), \ #define AT86RF2XX_PARAMS_BOARD {.spi = SPI_DEV(0), \
.spi_clk = SPI_CLK_5MHZ, \ .spi_clk = SPI_CLK_5MHZ, \
.cs_pin = GPIO_PIN(PORT_D, 4), \ .cs_pin = SPI_HWCS(1), \
.int_pin = GPIO_PIN(PORT_B, 9), \ .int_pin = GPIO_PIN(PORT_B, 9), \
.sleep_pin = GPIO_PIN(PORT_E, 6), \ .sleep_pin = GPIO_PIN(PORT_E, 6), \
.reset_pin = GPIO_PIN(PORT_C, 12)} .reset_pin = GPIO_PIN(PORT_C, 12)}
@ -143,7 +143,7 @@ void board_init(void);
/** @{ */ /** @{ */
#define MULLE_NVRAM_SPI_DEV SPI_DEV(0) #define MULLE_NVRAM_SPI_DEV SPI_DEV(0)
#define MULLE_NVRAM_SPI_CLK SPI_CLK_5MHZ #define MULLE_NVRAM_SPI_CLK SPI_CLK_5MHZ
#define MULLE_NVRAM_SPI_CS GPIO_PIN(PORT_D, 6) /**< FRAM CS pin */ #define MULLE_NVRAM_SPI_CS SPI_HWCS(3) /**< FRAM CS pin */
#define MULLE_NVRAM_CAPACITY 512 /**< FRAM size, in bytes */ #define MULLE_NVRAM_CAPACITY 512 /**< FRAM size, in bytes */
#define MULLE_NVRAM_SPI_ADDRESS_COUNT 1 /**< FRAM addressing size, in bytes */ #define MULLE_NVRAM_SPI_ADDRESS_COUNT 1 /**< FRAM addressing size, in bytes */
/** @} */ /** @} */

6
boards/mulle/include/periph_conf.h
View File

@ -265,9 +265,9 @@ static const spi_conf_t spi_config[] = {
.pin_clk = GPIO_PIN(PORT_D, 1), .pin_clk = GPIO_PIN(PORT_D, 1),
.pin_cs = { .pin_cs = {
GPIO_PIN(PORT_D, 0), GPIO_PIN(PORT_D, 0),
GPIO_UNDEF, GPIO_PIN(PORT_D, 4),
GPIO_UNDEF, GPIO_PIN(PORT_D, 5),
GPIO_UNDEF, GPIO_PIN(PORT_D, 6),
GPIO_UNDEF GPIO_UNDEF
}, },
.pcr = GPIO_AF_2, .pcr = GPIO_AF_2,