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drivers/soft_spi: remove nanosleep
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@ -14,7 +14,7 @@
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* This module provides a software implemented Serial Peripheral Interface bus.
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* This module provides a software implemented Serial Peripheral Interface bus.
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* It is intended to be used in situation where hardware spi is not available.
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* It is intended to be used in situation where hardware spi is not available.
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* The signatures of the functions are similar to the functions declared in spi.h
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* The signatures of the functions are similar to the functions declared in spi.h
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* The clock speed is approximated by using xtimer_nanosleep.
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* The clock speed is approximated by using xtimer_usleep.
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* Currently only the use of MOSI in master mode is implemented. Therefore receiving
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* Currently only the use of MOSI in master mode is implemented. Therefore receiving
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* data from a slave is currently not possible.
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* data from a slave is currently not possible.
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* @{
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* @{
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@ -116,9 +116,9 @@ typedef enum {
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* delay between two clock edges.
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* delay between two clock edges.
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*/
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*/
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typedef enum {
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typedef enum {
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SOFT_SPI_CLK_100KHZ = 5000, /**< drive the SPI bus with less than 100kHz */
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SOFT_SPI_CLK_100KHZ = 5, /**< drive the SPI bus with less than 100kHz */
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SOFT_SPI_CLK_400KHZ = 1250, /**< drive the SPI bus with less than 400kHz */
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SOFT_SPI_CLK_1MHZ = 1, /**< drive the SPI bus with less than 1MHz */
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SOFT_SPI_CLK_DEFAULT = 0, /**< drive the SPI bus with maximum speed possible */
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SOFT_SPI_CLK_DEFAULT = 0, /**< drive the SPI bus with maximum speed possible */
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} soft_spi_clk_t;
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} soft_spi_clk_t;
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/**
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/**
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@ -154,7 +154,7 @@ static inline uint8_t _transfer_one_byte(soft_spi_t bus, uint8_t out)
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uint8_t bit = out >> 7;
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uint8_t bit = out >> 7;
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gpio_write(soft_spi_config[bus].mosi_pin, bit);
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gpio_write(soft_spi_config[bus].mosi_pin, bit);
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xtimer_nanosleep(soft_spi_config[bus].soft_spi_clk);
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xtimer_usleep(soft_spi_config[bus].soft_spi_clk);
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gpio_toggle(soft_spi_config[bus].clk_pin);
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gpio_toggle(soft_spi_config[bus].clk_pin);
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out <<= 1; /*shift transfer register*/
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out <<= 1; /*shift transfer register*/
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@ -162,7 +162,7 @@ static inline uint8_t _transfer_one_byte(soft_spi_t bus, uint8_t out)
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bit = gpio_read(soft_spi_config[bus].miso_pin);
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bit = gpio_read(soft_spi_config[bus].miso_pin);
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out = bit ? (out | 0x01) : (out & 0xfe); /*set or delete bit 0*/
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out = bit ? (out | 0x01) : (out & 0xfe); /*set or delete bit 0*/
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xtimer_nanosleep(soft_spi_config[bus].soft_spi_clk);
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xtimer_usleep(soft_spi_config[bus].soft_spi_clk);
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--i;
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--i;
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if (i > 0) {
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if (i > 0) {
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gpio_toggle(soft_spi_config[bus].clk_pin);
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gpio_toggle(soft_spi_config[bus].clk_pin);
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@ -172,7 +172,7 @@ static inline uint8_t _transfer_one_byte(soft_spi_t bus, uint8_t out)
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if (SOFT_SPI_MODE_0 == soft_spi_config[bus].soft_spi_mode ||
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if (SOFT_SPI_MODE_0 == soft_spi_config[bus].soft_spi_mode ||
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SOFT_SPI_MODE_2 == soft_spi_config[bus].soft_spi_mode) {
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SOFT_SPI_MODE_2 == soft_spi_config[bus].soft_spi_mode) {
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/* CPHA = 0 */
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/* CPHA = 0 */
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xtimer_nanosleep(soft_spi_config[bus].soft_spi_clk);
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xtimer_usleep(soft_spi_config[bus].soft_spi_clk);
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gpio_toggle(soft_spi_config[bus].clk_pin);
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gpio_toggle(soft_spi_config[bus].clk_pin);
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}
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}
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