From 1ef9ca8a6fa59a67f21bcca32f7d77e62cb4d06c Mon Sep 17 00:00:00 2001 From: Francisco Molina Date: Tue, 30 Nov 2021 09:32:54 +0100 Subject: [PATCH] drivers/soft_spi: remove nanosleep --- drivers/include/soft_spi.h | 8 ++++---- drivers/soft_spi/soft_spi.c | 6 +++--- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/include/soft_spi.h b/drivers/include/soft_spi.h index 777552ee48..69860561b7 100644 --- a/drivers/include/soft_spi.h +++ b/drivers/include/soft_spi.h @@ -14,7 +14,7 @@ * This module provides a software implemented Serial Peripheral Interface bus. * It is intended to be used in situation where hardware spi is not available. * The signatures of the functions are similar to the functions declared in spi.h - * The clock speed is approximated by using xtimer_nanosleep. + * The clock speed is approximated by using xtimer_usleep. * Currently only the use of MOSI in master mode is implemented. Therefore receiving * data from a slave is currently not possible. * @{ @@ -116,9 +116,9 @@ typedef enum { * delay between two clock edges. */ typedef enum { - SOFT_SPI_CLK_100KHZ = 5000, /**< drive the SPI bus with less than 100kHz */ - SOFT_SPI_CLK_400KHZ = 1250, /**< drive the SPI bus with less than 400kHz */ - SOFT_SPI_CLK_DEFAULT = 0, /**< drive the SPI bus with maximum speed possible */ + SOFT_SPI_CLK_100KHZ = 5, /**< drive the SPI bus with less than 100kHz */ + SOFT_SPI_CLK_1MHZ = 1, /**< drive the SPI bus with less than 1MHz */ + SOFT_SPI_CLK_DEFAULT = 0, /**< drive the SPI bus with maximum speed possible */ } soft_spi_clk_t; /** diff --git a/drivers/soft_spi/soft_spi.c b/drivers/soft_spi/soft_spi.c index 9e31e24b53..8786b4bcdb 100644 --- a/drivers/soft_spi/soft_spi.c +++ b/drivers/soft_spi/soft_spi.c @@ -154,7 +154,7 @@ static inline uint8_t _transfer_one_byte(soft_spi_t bus, uint8_t out) uint8_t bit = out >> 7; gpio_write(soft_spi_config[bus].mosi_pin, bit); - xtimer_nanosleep(soft_spi_config[bus].soft_spi_clk); + xtimer_usleep(soft_spi_config[bus].soft_spi_clk); gpio_toggle(soft_spi_config[bus].clk_pin); out <<= 1; /*shift transfer register*/ @@ -162,7 +162,7 @@ static inline uint8_t _transfer_one_byte(soft_spi_t bus, uint8_t out) bit = gpio_read(soft_spi_config[bus].miso_pin); out = bit ? (out | 0x01) : (out & 0xfe); /*set or delete bit 0*/ - xtimer_nanosleep(soft_spi_config[bus].soft_spi_clk); + xtimer_usleep(soft_spi_config[bus].soft_spi_clk); --i; if (i > 0) { gpio_toggle(soft_spi_config[bus].clk_pin); @@ -172,7 +172,7 @@ static inline uint8_t _transfer_one_byte(soft_spi_t bus, uint8_t out) if (SOFT_SPI_MODE_0 == soft_spi_config[bus].soft_spi_mode || SOFT_SPI_MODE_2 == soft_spi_config[bus].soft_spi_mode) { /* CPHA = 0 */ - xtimer_nanosleep(soft_spi_config[bus].soft_spi_clk); + xtimer_usleep(soft_spi_config[bus].soft_spi_clk); gpio_toggle(soft_spi_config[bus].clk_pin); }