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boards/sipeed-longan-nano: add periph_adc support
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@ -14,6 +14,7 @@ config BOARD_SIPEED_LONGAN_NANO
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select CPU_MODEL_GD32VF103CBT6
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select BOARD_HAS_HXTAL
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select BOARD_HAS_LXTAL
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select HAS_PERIPH_ADC
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select HAS_PERIPH_I2C
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select HAS_PERIPH_PWM
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select HAS_PERIPH_SPI
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@ -21,4 +22,9 @@ config BOARD_SIPEED_LONGAN_NANO
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select HAS_PERIPH_UART
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select HAVE_SAUL_GPIO
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config SIPEED_LONGAN_NANO_WITH_TFT
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bool "Board with TFT display"
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help
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Indicates that a Sipeed Longan Nano board with TFT display is used.
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source "$(RIOTBOARD)/common/gd32v/Kconfig"
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@ -1,6 +1,7 @@
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CPU_MODEL = gd32vf103cbt6
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_pwm
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FEATURES_PROVIDED += periph_spi
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@ -31,7 +31,7 @@ on-board components:
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| Timers | 5 x 16-bit timer | yes |
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| RTC | 1 x 32-bit counter, 20-bit prescaler | yes |
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| WDT | 2 x 12-bit counter, 3-bit prescaler | yes |
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| ADC | 2 x 12-bit units, 16 channels, 1 Msps | no |
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| ADC | 2 x 12-bit units, 16 channels @ 1 Msps | yes |
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| DAC | 2 x 12-bit channel | no |
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| UART | - | yes |
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| USART | 3 | yes |
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@ -61,12 +61,19 @@ MCU pins and their configuration in RIOT.
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| PA0 | BOOT0 | BTN0 | BOOT | |
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| PA1 | | PWM_DEV(0) CH0 | LED1 green | |
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| PA2 | | PWM_DEV(0) CH1 | LED2 blue | |
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| PA4 | SPI1 CS | SPI_DEV(1) CS | | |
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| PA5 | SPI1 SCLK | SPI_DEV(1) SCLK | | |
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| PA6 | SPI1 MISO | SPI_DEV(1) MISO | | |
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| PA7 | SPI1 MOSI | SPI_DEV(1) MOSI | | |
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| PA3 | ADC01_IN3 | ADC_LINE(1) | | |
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| PA4 | ADC01_IN4 | ADC_LINE(6) | | N/A if SPI is used |
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| PA5 | ADC01_IN5 | ADC_LINE(7) | | N/A if SPI or TFT is used |
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| PA6 | ADC01_IN6 | ADC_LINE(8) | | N/A if SPI is used |
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| PA7 | ADC01_IN7 | ADC_LINE(9) | | N/A if SPI or TFT is used |
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| PA4 | SPI1 CS | SPI_DEV(1) CS | | N/A if ADC_LINE(6) is used |
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| PA5 | SPI1 SCLK | SPI_DEV(1) SCLK | | N/A if ADC_LINE(7) is used |
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| PA6 | SPI1 MISO | SPI_DEV(1) MISO | | N/A if ADC_LINE(8) is used |
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| PA7 | SPI1 MOSI | SPI_DEV(1) MOSI | | N/A if ADC_LINE(9) is used |
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| PA9 | USART0 TX | UART_DEV(0) TX | UART TX | |
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| PA10 | USART0 RX | UART_DEV(0) RX | UART RX | |
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| PB0 | ADC01_IN8 | ADC_LINE(4) | | N/A if TFT is used |
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| PB1 | ADC01_IN8 | ADC_LINE(5) | | N/A if TFT is used |
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| PB6 | I2C0 SCL | I2C_DEV(0) SCL | | |
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| PB7 | I2C0 SDA | I2C_DEV(0) SDA | | |
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| PB8 | | PWM_DEV(1) CH0 | | N/A if CAN is used |
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@ -78,6 +85,11 @@ MCU pins and their configuration in RIOT.
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| PB14 | SPI0 MISO | SPI_DEV(0) MISO | | |
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| PB15 | SPI0 MOSI | SPI_DEV(0) MOSI | | |
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| PC13 | | | LED0 red | |
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| - | ADC01_IN16 | ADC_LINE(2) | | internal Temperature channel |
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| - | ADC01_IN17 | ADC_LINE(3) | | internal VFEF channel |
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@note Since the availability of `ADC_LINE(4)` to `ADC_LINE(9)` depends on other
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peripheral configurations, their index may vary.
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## Flashing the Device
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@ -45,6 +45,38 @@
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extern "C" {
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#endif
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/**
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* @name ADC configuration
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* @{
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*/
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static const adc_conf_t adc_config[] = {
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{ .pin = GPIO_PIN(PORT_A, 0), .dev = 0, .chan = 0 },
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{ .pin = GPIO_PIN(PORT_A, 3), .dev = 0, .chan = 3 },
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/* ADC Temperature channel */
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{ .pin = GPIO_UNDEF, .dev = 0, .chan = 16 },
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/* ADC VREF channel */
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{ .pin = GPIO_UNDEF, .dev = 0, .chan = 17 },
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#if !defined(CONFIG_SIPEED_LONGAN_NANO_WITH_TFT)
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/* This conflicts with TFT pins if connected. */
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{ .pin = GPIO_PIN(PORT_B, 0), .dev = 0, .chan = 8 },
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{ .pin = GPIO_PIN(PORT_B, 1), .dev = 0, .chan = 9 },
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#endif
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#if !defined(MODULE_PERIPH_SPI)
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/* This conflicts with the SPI0 controller which is used for TFT if connected */
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{ .pin = GPIO_PIN(PORT_A, 4), .dev = 0, .chan = 4 },
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#if !defined(CONFIG_SIPEED_LONGAN_NANO_WITH_TFT)
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{ .pin = GPIO_PIN(PORT_A, 5), .dev = 0, .chan = 5 },
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#endif /* !defined(CONFIG_SIPEED_LONGAN_NANO_WITH_TFT) */
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{ .pin = GPIO_PIN(PORT_A, 6), .dev = 0, .chan = 6 },
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#if !defined(CONFIG_SIPEED_LONGAN_NANO_WITH_TFT)
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{ .pin = GPIO_PIN(PORT_A, 7), .dev = 0, .chan = 7 },
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#endif /* !defined(CONFIG_SIPEED_LONGAN_NANO_WITH_TFT) */
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#endif
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};
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#define ADC_NUMOF ARRAY_SIZE(adc_config)
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/** @} */
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/**
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* @name PWM configuration
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* @{
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