From 15a3b08aa79f7e06ebab9a2ac3bbc47c2f6803f3 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Thu, 19 Jan 2023 16:52:21 +0100 Subject: [PATCH] boards/sipeed-longan-nano: add periph_adc support --- boards/sipeed-longan-nano/Kconfig | 6 ++++ boards/sipeed-longan-nano/Makefile.features | 1 + boards/sipeed-longan-nano/doc.txt | 22 ++++++++++--- .../sipeed-longan-nano/include/periph_conf.h | 32 +++++++++++++++++++ 4 files changed, 56 insertions(+), 5 deletions(-) diff --git a/boards/sipeed-longan-nano/Kconfig b/boards/sipeed-longan-nano/Kconfig index 7597d38880..c22034b2a8 100644 --- a/boards/sipeed-longan-nano/Kconfig +++ b/boards/sipeed-longan-nano/Kconfig @@ -14,6 +14,7 @@ config BOARD_SIPEED_LONGAN_NANO select CPU_MODEL_GD32VF103CBT6 select BOARD_HAS_HXTAL select BOARD_HAS_LXTAL + select HAS_PERIPH_ADC select HAS_PERIPH_I2C select HAS_PERIPH_PWM select HAS_PERIPH_SPI @@ -21,4 +22,9 @@ config BOARD_SIPEED_LONGAN_NANO select HAS_PERIPH_UART select HAVE_SAUL_GPIO +config SIPEED_LONGAN_NANO_WITH_TFT + bool "Board with TFT display" + help + Indicates that a Sipeed Longan Nano board with TFT display is used. + source "$(RIOTBOARD)/common/gd32v/Kconfig" diff --git a/boards/sipeed-longan-nano/Makefile.features b/boards/sipeed-longan-nano/Makefile.features index 392f643648..2c4bc7ac61 100644 --- a/boards/sipeed-longan-nano/Makefile.features +++ b/boards/sipeed-longan-nano/Makefile.features @@ -1,6 +1,7 @@ CPU_MODEL = gd32vf103cbt6 # Put defined MCU peripherals here (in alphabetical order) +FEATURES_PROVIDED += periph_adc FEATURES_PROVIDED += periph_i2c FEATURES_PROVIDED += periph_pwm FEATURES_PROVIDED += periph_spi diff --git a/boards/sipeed-longan-nano/doc.txt b/boards/sipeed-longan-nano/doc.txt index 04ec0c4187..4624249485 100644 --- a/boards/sipeed-longan-nano/doc.txt +++ b/boards/sipeed-longan-nano/doc.txt @@ -31,7 +31,7 @@ on-board components: | Timers | 5 x 16-bit timer | yes | | RTC | 1 x 32-bit counter, 20-bit prescaler | yes | | WDT | 2 x 12-bit counter, 3-bit prescaler | yes | -| ADC | 2 x 12-bit units, 16 channels, 1 Msps | no | +| ADC | 2 x 12-bit units, 16 channels @ 1 Msps | yes | | DAC | 2 x 12-bit channel | no | | UART | - | yes | | USART | 3 | yes | @@ -61,12 +61,19 @@ MCU pins and their configuration in RIOT. | PA0 | BOOT0 | BTN0 | BOOT | | | PA1 | | PWM_DEV(0) CH0 | LED1 green | | | PA2 | | PWM_DEV(0) CH1 | LED2 blue | | -| PA4 | SPI1 CS | SPI_DEV(1) CS | | | -| PA5 | SPI1 SCLK | SPI_DEV(1) SCLK | | | -| PA6 | SPI1 MISO | SPI_DEV(1) MISO | | | -| PA7 | SPI1 MOSI | SPI_DEV(1) MOSI | | | +| PA3 | ADC01_IN3 | ADC_LINE(1) | | | +| PA4 | ADC01_IN4 | ADC_LINE(6) | | N/A if SPI is used | +| PA5 | ADC01_IN5 | ADC_LINE(7) | | N/A if SPI or TFT is used | +| PA6 | ADC01_IN6 | ADC_LINE(8) | | N/A if SPI is used | +| PA7 | ADC01_IN7 | ADC_LINE(9) | | N/A if SPI or TFT is used | +| PA4 | SPI1 CS | SPI_DEV(1) CS | | N/A if ADC_LINE(6) is used | +| PA5 | SPI1 SCLK | SPI_DEV(1) SCLK | | N/A if ADC_LINE(7) is used | +| PA6 | SPI1 MISO | SPI_DEV(1) MISO | | N/A if ADC_LINE(8) is used | +| PA7 | SPI1 MOSI | SPI_DEV(1) MOSI | | N/A if ADC_LINE(9) is used | | PA9 | USART0 TX | UART_DEV(0) TX | UART TX | | | PA10 | USART0 RX | UART_DEV(0) RX | UART RX | | +| PB0 | ADC01_IN8 | ADC_LINE(4) | | N/A if TFT is used | +| PB1 | ADC01_IN8 | ADC_LINE(5) | | N/A if TFT is used | | PB6 | I2C0 SCL | I2C_DEV(0) SCL | | | | PB7 | I2C0 SDA | I2C_DEV(0) SDA | | | | PB8 | | PWM_DEV(1) CH0 | | N/A if CAN is used | @@ -78,6 +85,11 @@ MCU pins and their configuration in RIOT. | PB14 | SPI0 MISO | SPI_DEV(0) MISO | | | | PB15 | SPI0 MOSI | SPI_DEV(0) MOSI | | | | PC13 | | | LED0 red | | +| - | ADC01_IN16 | ADC_LINE(2) | | internal Temperature channel | +| - | ADC01_IN17 | ADC_LINE(3) | | internal VFEF channel | + +@note Since the availability of `ADC_LINE(4)` to `ADC_LINE(9)` depends on other +peripheral configurations, their index may vary. ## Flashing the Device diff --git a/boards/sipeed-longan-nano/include/periph_conf.h b/boards/sipeed-longan-nano/include/periph_conf.h index 3f9027f7a6..0ac1921c7b 100644 --- a/boards/sipeed-longan-nano/include/periph_conf.h +++ b/boards/sipeed-longan-nano/include/periph_conf.h @@ -45,6 +45,38 @@ extern "C" { #endif +/** + * @name ADC configuration + * @{ + */ +static const adc_conf_t adc_config[] = { + { .pin = GPIO_PIN(PORT_A, 0), .dev = 0, .chan = 0 }, + { .pin = GPIO_PIN(PORT_A, 3), .dev = 0, .chan = 3 }, + /* ADC Temperature channel */ + { .pin = GPIO_UNDEF, .dev = 0, .chan = 16 }, + /* ADC VREF channel */ + { .pin = GPIO_UNDEF, .dev = 0, .chan = 17 }, +#if !defined(CONFIG_SIPEED_LONGAN_NANO_WITH_TFT) + /* This conflicts with TFT pins if connected. */ + { .pin = GPIO_PIN(PORT_B, 0), .dev = 0, .chan = 8 }, + { .pin = GPIO_PIN(PORT_B, 1), .dev = 0, .chan = 9 }, +#endif +#if !defined(MODULE_PERIPH_SPI) + /* This conflicts with the SPI0 controller which is used for TFT if connected */ + { .pin = GPIO_PIN(PORT_A, 4), .dev = 0, .chan = 4 }, +#if !defined(CONFIG_SIPEED_LONGAN_NANO_WITH_TFT) + { .pin = GPIO_PIN(PORT_A, 5), .dev = 0, .chan = 5 }, +#endif /* !defined(CONFIG_SIPEED_LONGAN_NANO_WITH_TFT) */ + { .pin = GPIO_PIN(PORT_A, 6), .dev = 0, .chan = 6 }, +#if !defined(CONFIG_SIPEED_LONGAN_NANO_WITH_TFT) + { .pin = GPIO_PIN(PORT_A, 7), .dev = 0, .chan = 7 }, +#endif /* !defined(CONFIG_SIPEED_LONGAN_NANO_WITH_TFT) */ +#endif +}; + +#define ADC_NUMOF ARRAY_SIZE(adc_config) +/** @} */ + /** * @name PWM configuration * @{