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Merge pull request #6994 from gebart/pr/frdm-k22f
cpu+board frdm-k22f: Add NXP FRDM-K22F development board
This commit is contained in:
Joakim Nohlgård
GitHub
commit
0f494bb430
47
boards/frdm-common/Makefile.include
Normal file
47
boards/frdm-common/Makefile.include
Normal file
@ -0,0 +1,47 @@
|
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# set default port depending on operating system
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PORT_LINUX ?= /dev/ttyACM0
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PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
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export FFLAGS = flash-elf
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# Use the shared OpenOCD configuration
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# Using dap or jlink depends on which firmware the OpenSDA debugger is running
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export FRDM_IFACE ?= dap
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#export FRDM_IFACE ?= jlink
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# OpenOCD v0.10.0 and newer have built-in support for disabling the Kinetis
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# watchdog automatically. However, current stable releases of Ubuntu and Debian
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# have only version 0.9.0 and older OpenOCD packages (Ubuntu 17.04, Debian Jessie)
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# Set this to 0 to avoid the extra manual step of disabling the watchdog.
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export USE_OLD_OPENOCD ?= 1
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ifeq (1,$(USE_OLD_OPENOCD))
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# We need special handling of the watchdog if we want to speed up the flash
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# verification by using the MCU to compute the image checksum after flashing.
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# wdog-disable.bin is a precompiled binary which will disable the watchdog and
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# return control to the debugger (OpenOCD)
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export OPENOCD_PRE_VERIFY_CMDS += \
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-c 'load_image $(RIOTCPU)/kinetis_common/dist/wdog-disable.bin 0x20000000 bin' \
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-c 'resume 0x20000000'
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export OPENOCD_EXTRA_INIT
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.PHONY: flash
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flash: $(RIOTCPU)/kinetis_common/dist/wdog-disable.bin
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# Reset the default goal.
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.DEFAULT_GOAL :=
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export OPENOCD_CONFIG ?= $(RIOTBOARD)/frdm-common/dist/old-openocd-$(FRDM_IFACE)-$(CPU_FAMILY).cfg
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endif
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# Configuration for OpenOCD v0.10.0 and newer
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export OPENOCD_CONFIG ?= $(RIOTBOARD)/frdm-common/dist/openocd-$(FRDM_IFACE)-$(CPU_FAMILY).cfg
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# Check the flash configuration field before flashing
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export PRE_FLASH_CHECK_SCRIPT = $(RIOTCPU)/kinetis_common/dist/check-fcfield-elf.sh
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# setup serial terminal
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include $(RIOTMAKE)/tools/serial.inc.mk
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# this board uses openocd
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include $(RIOTMAKE)/tools/openocd.inc.mk
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48
boards/frdm-common/dist/old-openocd-dap-kx.cfg
vendored
Normal file
48
boards/frdm-common/dist/old-openocd-dap-kx.cfg
vendored
Normal file
@ -0,0 +1,48 @@
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#
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# Freescale Kinetis Kxx devices on a CMSIS-DAP adapter
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#
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source [find interface/cmsis-dap.cfg]
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME kx
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x2ba01477
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}
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set _TARGETNAME $_CHIPNAME.cpu
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swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
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$_CHIPNAME.cpu configure -event examine-start { puts "START..." ; }
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# It is important that "kinetis mdm check_security" is called for
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# 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start'
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# causes "kinetis mdm check_security" to fail the first time openocd
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# calls it when it tries to connect after the CPU has been power-cycled.
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$_CHIPNAME.cpu configure -event examine-end {
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kinetis mdm check_security
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}
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x1000 -work-area-backup 0
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flash bank $_CHIPNAME.flash kinetis 0 0 0 0 $_TARGETNAME
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cortex_m reset_config sysresetreq
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#reset_config srst_only srst_nogate connect_assert_srst
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adapter_khz 1000
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$_TARGETNAME configure -event gdb-attach {
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halt
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}
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$_TARGETNAME configure -rtos auto
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48
boards/frdm-common/dist/old-openocd-jlink-kx.cfg
vendored
Normal file
48
boards/frdm-common/dist/old-openocd-jlink-kx.cfg
vendored
Normal file
@ -0,0 +1,48 @@
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#
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# Freescale Kinetis Kxx devices on a Segger J-Link adapter
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#
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source [find interface/jlink.cfg]
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME kx
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x2ba01477
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}
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set _TARGETNAME $_CHIPNAME.cpu
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swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
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$_CHIPNAME.cpu configure -event examine-start { puts "START..." ; }
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# It is important that "kinetis mdm check_security" is called for
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# 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start'
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# causes "kinetis mdm check_security" to fail the first time openocd
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# calls it when it tries to connect after the CPU has been power-cycled.
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$_CHIPNAME.cpu configure -event examine-end {
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kinetis mdm check_security
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}
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x1000 -work-area-backup 0
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flash bank $_CHIPNAME.flash kinetis 0 0 0 0 $_TARGETNAME
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cortex_m reset_config sysresetreq
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#reset_config srst_only srst_nogate connect_assert_srst
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adapter_khz 1000
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$_TARGETNAME configure -event gdb-attach {
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halt
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}
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$_TARGETNAME configure -rtos auto
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22
boards/frdm-common/dist/openocd-dap-kx.cfg
vendored
Normal file
22
boards/frdm-common/dist/openocd-dap-kx.cfg
vendored
Normal file
@ -0,0 +1,22 @@
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#
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# NXP Kinetis Freedom developer board
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#
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# OpenSDA is the on-board debugger, some boards have a CMSIS-DAP compatible
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# interface, other boards comes pre-flashed with a Segger J-Link compatible
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# firmware. The OpenSDA controller can be re-flashed to provide either of the two.
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# Both interfaces work with OpenOCD, but we need to tell which one we have on
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# our debugger.
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# CMSIS-DAP (DAPLink) compatible OpenSDA firmware binary images can be found at:
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# http://www.nxp.com/opensda
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source [find interface/cmsis-dap.cfg]
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# Kinetis K series CPUs
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source [find target/kx.cfg]
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reset_config srst_only
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$_TARGETNAME configure -event gdb-attach {
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halt
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}
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$_TARGETNAME configure -rtos auto
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22
boards/frdm-common/dist/openocd-jlink-kx.cfg
vendored
Normal file
22
boards/frdm-common/dist/openocd-jlink-kx.cfg
vendored
Normal file
@ -0,0 +1,22 @@
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#
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# NXP Kinetis Freedom developer board
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#
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# OpenSDA is the on-board debugger, some boards have a CMSIS-DAP compatible
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# interface, other boards comes pre-flashed with a Segger J-Link compatible
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# firmware. The OpenSDA controller can be re-flashed to provide either of the two.
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# Both interfaces work with OpenOCD, but we need to tell which one we have on
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# our debugger.
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# J-Link compatible firmware binaries for OpenSDA can be found at:
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# https://www.segger.com/downloads/jlink#JLinkOpenSDABoardSpecificFirmwares
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source [find interface/jlink.cfg]
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# Kinetis K series CPUs
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source [find target/kx.cfg]
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reset_config srst_only
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$_TARGETNAME configure -event gdb-attach {
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halt
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}
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$_TARGETNAME configure -rtos auto
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3
boards/frdm-k22f/Makefile
Normal file
3
boards/frdm-k22f/Makefile
Normal file
@ -0,0 +1,3 @@
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MODULE = board
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include $(RIOTBASE)/Makefile.base
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4
boards/frdm-k22f/Makefile.dep
Normal file
4
boards/frdm-k22f/Makefile.dep
Normal file
@ -0,0 +1,4 @@
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ifneq (,$(filter saul_default,$(USEMODULE)))
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USEMODULE += saul_gpio
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USEMODULE += saul_adc
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endif
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18
boards/frdm-k22f/Makefile.features
Normal file
18
boards/frdm-k22f/Makefile.features
Normal file
@ -0,0 +1,18 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_hwrng
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_pwm
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FEATURES_PROVIDED += periph_rtc
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FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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# Various other features (if any)
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FEATURES_PROVIDED += cpp
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# The board MPU family (used for grouping by the CI system)
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FEATURES_MCU_GROUP = cortex_m4_1
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6
boards/frdm-k22f/Makefile.include
Normal file
6
boards/frdm-k22f/Makefile.include
Normal file
@ -0,0 +1,6 @@
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# define the cpu used by the board
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export CPU = k22f
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export CPU_MODEL = mk22fn512vlh12
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# Include default FRDM board config
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include $(RIOTBOARD)/frdm-common/Makefile.include
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68
boards/frdm-k22f/board.c
Normal file
68
boards/frdm-k22f/board.c
Normal file
@ -0,0 +1,68 @@
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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* Copyright (C) 2014 PHYTEC Messtechnik GmbH
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* Copyright (C) 2017 Eistec AB
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
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||||
*/
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/**
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* @ingroup boards_frdm-k64f
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* @{
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*
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* @file
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* @brief Board specific implementations for the FRDM-K22F
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*
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* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
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*
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* @}
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*/
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#include <stdint.h>
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#include "board.h"
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#include "mcg.h"
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#include "periph/gpio.h"
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#define SIM_CLKDIV1_48MHZ (SIM_CLKDIV1_OUTDIV1(0) | \
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SIM_CLKDIV1_OUTDIV2(1) | \
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SIM_CLKDIV1_OUTDIV3(1) | \
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SIM_CLKDIV1_OUTDIV4(1))
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static void cpu_clock_init(void);
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void board_init(void)
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||||
{
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/* initialize the clock system */
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cpu_clock_init();
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/* initialize the CPU core */
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cpu_init();
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/* initialize and turn off the on-board RGB-LED */
|
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gpio_init(LED0_PIN, GPIO_OUT);
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gpio_init(LED1_PIN, GPIO_OUT);
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gpio_init(LED2_PIN, GPIO_OUT);
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gpio_set(LED0_PIN);
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gpio_set(LED1_PIN);
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gpio_set(LED2_PIN);
|
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}
|
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|
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/**
|
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* @brief Configure the controllers clock system
|
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*
|
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* | Clock name | Run mode frequency (max) | VLPR mode frequency (max) |
|
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*
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* | Core | 120 MHz | 4 MHz |
|
||||
* | System | 120 MHz | 4 MHz |
|
||||
* | Bus | 60 MHz | 4 MHz |
|
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* | FlexBus | 30 MHz | 800 kHz |
|
||||
* | Flash | 26.67 MHz | 4 MHz |
|
||||
*/
|
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static void cpu_clock_init(void)
|
||||
{
|
||||
/* setup system prescalers */
|
||||
SIM->CLKDIV1 = (uint32_t)SIM_CLKDIV1_48MHZ;
|
||||
|
||||
kinetis_mcg_set_mode(KINETIS_MCG_PEE);
|
||||
}
|
||||
81
boards/frdm-k22f/include/adc_params.h
Normal file
81
boards/frdm-k22f/include/adc_params.h
Normal file
@ -0,0 +1,81 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
* directory for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup boards_frdm-k22f
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Board specific configuration of direct mapped ADC
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
*/
|
||||
|
||||
#ifndef ADC_PARAMS_H
|
||||
#define ADC_PARAMS_H
|
||||
|
||||
#include "board.h"
|
||||
#include "saul/periph.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief ADC configuration
|
||||
*/
|
||||
static const saul_adc_params_t saul_adc_params[] =
|
||||
{
|
||||
{
|
||||
.name = "ADC0_DP",
|
||||
.line = ADC_LINE(0),
|
||||
.res = ADC_RES_16BIT,
|
||||
},
|
||||
{
|
||||
.name = "ADC0_DM",
|
||||
.line = ADC_LINE(1),
|
||||
.res = ADC_RES_16BIT,
|
||||
},
|
||||
{
|
||||
.name = "ADC1_DP",
|
||||
.line = ADC_LINE(2),
|
||||
.res = ADC_RES_16BIT,
|
||||
},
|
||||
{
|
||||
.name = "ADC1_DM",
|
||||
.line = ADC_LINE(3),
|
||||
.res = ADC_RES_16BIT,
|
||||
},
|
||||
{
|
||||
.name = "A0",
|
||||
.line = ADC_LINE(4),
|
||||
.res = ADC_RES_16BIT,
|
||||
},
|
||||
{
|
||||
.name = "A1",
|
||||
.line = ADC_LINE(5),
|
||||
.res = ADC_RES_16BIT,
|
||||
},
|
||||
{
|
||||
.name = "A2",
|
||||
.line = ADC_LINE(6),
|
||||
.res = ADC_RES_16BIT,
|
||||
},
|
||||
{
|
||||
.name = "A3",
|
||||
.line = ADC_LINE(7),
|
||||
.res = ADC_RES_16BIT,
|
||||
},
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ADC_PARAMS_H */
|
||||
/** @} */
|
||||
67
boards/frdm-k22f/include/board.h
Normal file
67
boards/frdm-k22f/include/board.h
Normal file
@ -0,0 +1,67 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup boards_frdm-k22f NXP FRDM-K22F Board
|
||||
* @ingroup boards
|
||||
* @brief Board specific implementations for the FRDM-K22F
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Board specific definitions for the FRDM-K22F
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
#include "cpu.h"
|
||||
#include "periph_conf.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @name LED pin definitions and handlers
|
||||
* @{
|
||||
*/
|
||||
#define LED0_PIN GPIO_PIN(PORT_A, 1)
|
||||
#define LED1_PIN GPIO_PIN(PORT_A, 2)
|
||||
#define LED2_PIN GPIO_PIN(PORT_D, 5)
|
||||
|
||||
#define LED0_MASK (1 << 1)
|
||||
#define LED1_MASK (1 << 2)
|
||||
#define LED2_MASK (1 << 5)
|
||||
|
||||
#define LED0_ON (GPIOB->PCOR = LED0_MASK)
|
||||
#define LED0_OFF (GPIOB->PSOR = LED0_MASK)
|
||||
#define LED0_TOGGLE (GPIOB->PTOR = LED0_MASK)
|
||||
|
||||
#define LED1_ON (GPIOE->PCOR = LED1_MASK)
|
||||
#define LED1_OFF (GPIOE->PSOR = LED1_MASK)
|
||||
#define LED1_TOGGLE (GPIOE->PTOR = LED1_MASK)
|
||||
|
||||
#define LED2_ON (GPIOB->PCOR = LED2_MASK)
|
||||
#define LED2_OFF (GPIOB->PSOR = LED2_MASK)
|
||||
#define LED2_TOGGLE (GPIOB->PTOR = LED2_MASK)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
|
||||
*/
|
||||
void board_init(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* BOARD_H */
|
||||
/** @} */
|
||||
56
boards/frdm-k22f/include/gpio_params.h
Normal file
56
boards/frdm-k22f/include/gpio_params.h
Normal file
@ -0,0 +1,56 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
* directory for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup boards_frdm_k22f
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Board specific configuration of direct mapped GPIOs
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
*/
|
||||
|
||||
#ifndef GPIO_PARAMS_H
|
||||
#define GPIO_PARAMS_H
|
||||
|
||||
#include "board.h"
|
||||
#include "saul/periph.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief LED configuration
|
||||
*/
|
||||
static const saul_gpio_params_t saul_gpio_params[] =
|
||||
{
|
||||
{
|
||||
.name = "LED(red)",
|
||||
.pin = LED0_PIN,
|
||||
.mode = GPIO_OUT
|
||||
},
|
||||
{
|
||||
.name = "LED(green)",
|
||||
.pin = LED1_PIN,
|
||||
.mode = GPIO_OUT
|
||||
},
|
||||
{
|
||||
.name = "LED(blue)",
|
||||
.pin = LED2_PIN,
|
||||
.mode = GPIO_OUT
|
||||
},
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* GPIO_PARAMS_H */
|
||||
/** @} */
|
||||
289
boards/frdm-k22f/include/periph_conf.h
Normal file
289
boards/frdm-k22f/include/periph_conf.h
Normal file
@ -0,0 +1,289 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup boards_frdm-k22f
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @name Peripheral MCU configuration for the FRDM-K22F
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
*/
|
||||
|
||||
#ifndef PERIPH_CONF_H
|
||||
#define PERIPH_CONF_H
|
||||
|
||||
#include "periph_cpu.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @name Clock system configuration
|
||||
* @{
|
||||
*/
|
||||
#define KINETIS_CPU_USE_MCG 1
|
||||
#define KINETIS_MCG_USE_ERC 1
|
||||
#define KINETIS_MCG_USE_PLL 1
|
||||
/* The crystal connected to OSC0 is 8 MHz */
|
||||
#define KINETIS_MCG_DCO_RANGE (48000000u)
|
||||
#define KINETIS_MCG_ERC_OSCILLATOR 1
|
||||
#define KINETIS_MCG_ERC_FRDIV 3 /* ERC divider = 256 */
|
||||
#define KINETIS_MCG_ERC_RANGE 1
|
||||
#define KINETIS_MCG_ERC_FREQ (40000000u)
|
||||
#define KINETIS_MCG_PLL_PRDIV 3 /* divide factor = 4 */
|
||||
#define KINETIS_MCG_PLL_VDIV0 0 /* multiply factor = 24 */
|
||||
#define KINETIS_MCG_PLL_FREQ (48000000u)
|
||||
|
||||
#define CLOCK_CORECLOCK KINETIS_MCG_PLL_FREQ
|
||||
#define CLOCK_BUSCLOCK (CLOCK_CORECLOCK / 2)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name Timer configuration
|
||||
* @{
|
||||
*/
|
||||
#define PIT_NUMOF (2U)
|
||||
#define PIT_CONFIG { \
|
||||
{ \
|
||||
.prescaler_ch = 0, \
|
||||
.count_ch = 1, \
|
||||
}, \
|
||||
{ \
|
||||
.prescaler_ch = 2, \
|
||||
.count_ch = 3, \
|
||||
}, \
|
||||
}
|
||||
#define LPTMR_NUMOF (1U)
|
||||
#define LPTMR_CONFIG { \
|
||||
{ \
|
||||
.dev = LPTMR0, \
|
||||
.irqn = LPTMR0_IRQn, \
|
||||
} \
|
||||
}
|
||||
#define TIMER_NUMOF ((PIT_NUMOF) + (LPTMR_NUMOF))
|
||||
|
||||
#define PIT_BASECLOCK (CLOCK_BUSCLOCK)
|
||||
#define PIT_ISR_0 isr_pit1
|
||||
#define PIT_ISR_1 isr_pit3
|
||||
#define LPTMR_ISR_0 isr_lptmr0
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name UART configuration
|
||||
* @{
|
||||
*/
|
||||
static const uart_conf_t uart_config[] = {
|
||||
{
|
||||
.dev = UART1,
|
||||
.freq = CLOCK_CORECLOCK,
|
||||
.pin_rx = GPIO_PIN(PORT_E, 1),
|
||||
.pin_tx = GPIO_PIN(PORT_E, 0),
|
||||
.pcr_rx = PORT_PCR_MUX(3),
|
||||
.pcr_tx = PORT_PCR_MUX(3),
|
||||
.irqn = UART1_RX_TX_IRQn,
|
||||
.scgc_addr = &SIM_SCGC4,
|
||||
.scgc_bit = SIM_SCGC4_UART1_SHIFT,
|
||||
.mode = UART_MODE_8N1,
|
||||
},
|
||||
};
|
||||
|
||||
#define UART_0_ISR (isr_uart1_rx_tx)
|
||||
|
||||
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name ADC configuration
|
||||
* @{
|
||||
*/
|
||||
static const adc_conf_t adc_config[] = {
|
||||
/* dev, pin, channel */
|
||||
{ .dev = ADC0, .pin = GPIO_UNDEF , .chan = 0 }, /* ADC0_DP0 */
|
||||
{ .dev = ADC0, .pin = GPIO_UNDEF , .chan = 19 }, /* ADC0_DM0 */
|
||||
{ .dev = ADC1, .pin = GPIO_UNDEF , .chan = 0 }, /* ADC1_DP0 */
|
||||
{ .dev = ADC1, .pin = GPIO_UNDEF , .chan = 19 }, /* ADC1_DM0 */
|
||||
{ .dev = ADC0, .pin = GPIO_PIN(PORT_B, 0), .chan = 8 }, /* PTB0 (Arduino A0) */
|
||||
{ .dev = ADC0, .pin = GPIO_PIN(PORT_B, 1), .chan = 9 }, /* PTB1 (Arduino A1) */
|
||||
{ .dev = ADC0, .pin = GPIO_PIN(PORT_C, 1), .chan = 15 }, /* PTC1 (Arduino A2) */
|
||||
{ .dev = ADC0, .pin = GPIO_PIN(PORT_C, 2), .chan = 4 }, /* PTC2 (Arduino A3) */
|
||||
};
|
||||
|
||||
#define ADC_NUMOF (sizeof(adc_config) / sizeof(adc_config[0]))
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name DAC configuration
|
||||
* @{
|
||||
*/
|
||||
#define DAC_CONFIG {}
|
||||
#define DAC_NUMOF 0
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name PWM configuration
|
||||
* @{
|
||||
*/
|
||||
static const pwm_conf_t pwm_config[] = {
|
||||
{
|
||||
.ftm = FTM0,
|
||||
.chan = {
|
||||
{ .pin = GPIO_PIN(PORT_A, 1), .af = 3, .ftm_chan = 6 },
|
||||
{ .pin = GPIO_PIN(PORT_A, 2), .af = 3, .ftm_chan = 7 },
|
||||
{ .pin = GPIO_PIN(PORT_D, 5), .af = 4, .ftm_chan = 5 },
|
||||
},
|
||||
.chan_numof = 3,
|
||||
.ftm_num = 0
|
||||
}
|
||||
};
|
||||
|
||||
#define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* @name SPI configuration
|
||||
*
|
||||
* Clock configuration values based on the configured 48Mhz module clock.
|
||||
*
|
||||
* Auto-generated by:
|
||||
* cpu/kinetis_common/dist/calc_spi_scalers/calc_spi_scalers.c
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
static const uint32_t spi_clk_config[] = {
|
||||
(
|
||||
SPI_CTAR_PBR(0) | SPI_CTAR_BR(8) | /* -> 93750Hz */
|
||||
SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(8) |
|
||||
SPI_CTAR_PASC(0) | SPI_CTAR_ASC(8) |
|
||||
SPI_CTAR_PDT(0) | SPI_CTAR_DT(8)
|
||||
),
|
||||
(
|
||||
SPI_CTAR_PBR(0) | SPI_CTAR_BR(6) | /* -> 375000Hz */
|
||||
SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(6) |
|
||||
SPI_CTAR_PASC(0) | SPI_CTAR_ASC(6) |
|
||||
SPI_CTAR_PDT(0) | SPI_CTAR_DT(6)
|
||||
),
|
||||
(
|
||||
SPI_CTAR_PBR(1) | SPI_CTAR_BR(4) | /* -> 1000000Hz */
|
||||
SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(3) |
|
||||
SPI_CTAR_PASC(1) | SPI_CTAR_ASC(3) |
|
||||
SPI_CTAR_PDT(1) | SPI_CTAR_DT(3)
|
||||
),
|
||||
(
|
||||
SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) | /* -> 4800000Hz */
|
||||
SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(0) |
|
||||
SPI_CTAR_PASC(2) | SPI_CTAR_ASC(0) |
|
||||
SPI_CTAR_PDT(2) | SPI_CTAR_DT(0)
|
||||
),
|
||||
(
|
||||
SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) | /* -> 8000000Hz */
|
||||
SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(0) |
|
||||
SPI_CTAR_PASC(1) | SPI_CTAR_ASC(0) |
|
||||
SPI_CTAR_PDT(1) | SPI_CTAR_DT(0)
|
||||
)
|
||||
};
|
||||
|
||||
static const spi_conf_t spi_config[] = {
|
||||
{
|
||||
.dev = SPI0,
|
||||
.pin_miso = GPIO_PIN(PORT_D, 3),
|
||||
.pin_mosi = GPIO_PIN(PORT_D, 2),
|
||||
.pin_clk = GPIO_PIN(PORT_D, 1),
|
||||
.pin_cs = {
|
||||
GPIO_PIN(PORT_C, 4),
|
||||
GPIO_PIN(PORT_D, 4),
|
||||
GPIO_UNDEF,
|
||||
GPIO_UNDEF,
|
||||
GPIO_UNDEF
|
||||
},
|
||||
.pcr = GPIO_AF_2,
|
||||
.simmask = SIM_SCGC6_SPI0_MASK
|
||||
}
|
||||
};
|
||||
|
||||
#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* @name I2C configuration
|
||||
* @{
|
||||
*/
|
||||
#define I2C_NUMOF (1U)
|
||||
#define I2C_CLK CLOCK_CORECLOCK
|
||||
#define I2C_0_EN 1
|
||||
#define I2C_IRQ_PRIO 1
|
||||
/* Low (10 kHz): MUL = 4, SCL divider = 1280, total: 5120 */
|
||||
#define KINETIS_I2C_F_ICR_LOW (0x35)
|
||||
#define KINETIS_I2C_F_MULT_LOW (2)
|
||||
/* Normal (100 kHz): MUL = 2, SCL divider = 240, total: 480 */
|
||||
#define KINETIS_I2C_F_ICR_NORMAL (0x1F)
|
||||
#define KINETIS_I2C_F_MULT_NORMAL (1)
|
||||
/* Fast (400 kHz): MUL = 1, SCL divider = 128, total: 128 */
|
||||
#define KINETIS_I2C_F_ICR_FAST (0x17)
|
||||
#define KINETIS_I2C_F_MULT_FAST (0)
|
||||
/* Fast plus (1000 kHz): MUL = 1, SCL divider = 48, total: 48 */
|
||||
#define KINETIS_I2C_F_ICR_FAST_PLUS (0x10)
|
||||
#define KINETIS_I2C_F_MULT_FAST_PLUS (0)
|
||||
|
||||
/* I2C 0 device configuration */
|
||||
#define I2C_0_DEV I2C0
|
||||
#define I2C_0_CLKEN() (SIM->SCGC4 |= (SIM_SCGC4_I2C0_MASK))
|
||||
#define I2C_0_CLKDIS() (SIM->SCGC4 &= ~(SIM_SCGC4_I2C0_MASK))
|
||||
#define I2C_0_IRQ I2C0_IRQn
|
||||
#define I2C_0_IRQ_HANDLER isr_i2c0
|
||||
/* I2C 0 pin configuration */
|
||||
#define I2C_0_PORT PORTB
|
||||
#define I2C_0_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK))
|
||||
#define I2C_0_PIN_AF 2
|
||||
#define I2C_0_SDA_PIN 3
|
||||
#define I2C_0_SCL_PIN 2
|
||||
#define I2C_0_PORT_CFG (PORT_PCR_MUX(I2C_0_PIN_AF) | PORT_PCR_ODE_MASK)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name GPIO configuration
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_IRQ_PRIO CPU_DEFAULT_IRQ_PRIO
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name RTT and RTC configuration
|
||||
* @{
|
||||
*/
|
||||
#define RTT_NUMOF (1U)
|
||||
#define RTC_NUMOF (1U)
|
||||
#define RTT_DEV RTC
|
||||
#define RTT_IRQ RTC_IRQn
|
||||
#define RTT_IRQ_PRIO 10
|
||||
#define RTT_UNLOCK() (SIM->SCGC6 |= (SIM_SCGC6_RTC_MASK))
|
||||
#define RTT_ISR isr_rtc
|
||||
#define RTT_FREQUENCY (1)
|
||||
#define RTT_MAX_VALUE (0xffffffff)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name Random Number Generator configuration
|
||||
* @{
|
||||
*/
|
||||
#define KINETIS_RNGA RNG
|
||||
#define HWRNG_CLKEN() (SIM->SCGC6 |= (1 << 9))
|
||||
#define HWRNG_CLKDIS() (SIM->SCGC6 &= ~(1 << 9))
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PERIPH_CONF_H */
|
||||
/** @} */
|
||||
@ -2,30 +2,5 @@
|
||||
export CPU = k64f
|
||||
export CPU_MODEL = mk64fn1m0vll12
|
||||
|
||||
# set default port depending on operating system
|
||||
PORT_LINUX ?= /dev/ttyACM0
|
||||
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
|
||||
|
||||
.PHONY: flash
|
||||
flash: $(RIOTCPU)/kinetis_common/dist/wdog-disable.bin
|
||||
|
||||
# Reset the default goal.
|
||||
.DEFAULT_GOAL :=
|
||||
|
||||
export FFLAGS = flash-elf
|
||||
export TUI = 1
|
||||
# We need special handling of the watchdog if we want to speed up the flash
|
||||
# verification by using the MCU to compute the image checksum after flashing.
|
||||
# wdog-disable.bin is a precompiled binary which will disable the watchdog and
|
||||
# return control to the debugger (OpenOCD)
|
||||
export OPENOCD_PRE_VERIFY_CMDS += \
|
||||
-c 'load_image $(RIOTCPU)/kinetis_common/dist/wdog-disable.bin 0x20000000 bin' \
|
||||
-c 'resume 0x20000000'
|
||||
export OPENOCD_EXTRA_INIT
|
||||
export PRE_FLASH_CHECK_SCRIPT = $(RIOTCPU)/kinetis_common/dist/check-fcfield-elf.sh
|
||||
|
||||
# setup serial terminal
|
||||
include $(RIOTMAKE)/tools/serial.inc.mk
|
||||
|
||||
# this board uses openocd
|
||||
include $(RIOTMAKE)/tools/openocd.inc.mk
|
||||
# Include default FRDM board config
|
||||
include $(RIOTBOARD)/frdm-common/Makefile.include
|
||||
|
||||
10
cpu/k22f/Makefile
Normal file
10
cpu/k22f/Makefile
Normal file
@ -0,0 +1,10 @@
|
||||
# define the module that is build
|
||||
MODULE = cpu
|
||||
|
||||
# add a list of subdirectories that should also be built
|
||||
DIRS = periph $(RIOTCPU)/cortexm_common $(KINETIS_COMMON)
|
||||
|
||||
# (file triggers compiler bug. see #5775)
|
||||
SRC_NOLTO += vectors.c
|
||||
|
||||
include $(RIOTBASE)/Makefile.base
|
||||
25
cpu/k22f/Makefile.include
Normal file
25
cpu/k22f/Makefile.include
Normal file
@ -0,0 +1,25 @@
|
||||
# define the CPU architecture for the k22f
|
||||
export CPU_ARCH = cortex-m4
|
||||
export CPU_FAMILY = kx
|
||||
|
||||
# map CPU models to generic Kinetis linker script
|
||||
LD_MK22FN512VLH12 = kinetis_f512l64u64.ld
|
||||
LD_MK22FN512VLL12 = kinetis_f512l64u64.ld
|
||||
LD_MK22FN512VDC12 = kinetis_f512l64u64.ld
|
||||
LD_MK22FN512VMP12 = kinetis_f512l64u64.ld
|
||||
|
||||
# tell the build system that the CPU depends on the Kinetis common files
|
||||
export USEMODULE += kinetis_common
|
||||
|
||||
# define path to kinetis module, which is needed for this CPU
|
||||
export KINETIS_COMMON = $(RIOTCPU)/kinetis_common/
|
||||
# CPU depends on the kinetis module, so include it
|
||||
include $(KINETIS_COMMON)Makefile.include
|
||||
|
||||
# this CPU implementation is using kinetis common startup
|
||||
export COMMON_STARTUP = $(KINETIS_COMMON)
|
||||
|
||||
# add the CPU specific system calls implementations for the linker
|
||||
export UNDEF += $(BINDIR)/cpu/vectors.o
|
||||
|
||||
include $(RIOTMAKE)/arch/cortexm.inc.mk
|
||||
32
cpu/k22f/cpu.c
Normal file
32
cpu/k22f/cpu.c
Normal file
@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_k22f
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Implementation of the K22F CPU initialization
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
* @}
|
||||
*/
|
||||
|
||||
#include "cpu.h"
|
||||
#include "periph/init.h"
|
||||
|
||||
/**
|
||||
* @brief Initialize the CPU, set IRQ priorities
|
||||
*/
|
||||
void cpu_init(void)
|
||||
{
|
||||
/* initialize the Cortex-M core */
|
||||
cortexm_init();
|
||||
/* trigger static peripheral initialization */
|
||||
periph_init();
|
||||
}
|
||||
76
cpu/k22f/include/cpu_conf.h
Normal file
76
cpu/k22f/include/cpu_conf.h
Normal file
@ -0,0 +1,76 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup cpu_k22f NXP Kinetis K22F MCU
|
||||
* @ingroup cpu
|
||||
* @brief CPU specific implementations for the NXP Kinetis K22F
|
||||
* Cortex-M4 MCU.
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Implementation specific CPU configuration options
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
*/
|
||||
|
||||
#ifndef CPU_CONF_H
|
||||
#define CPU_CONF_H
|
||||
|
||||
#include "cpu_conf_common.h"
|
||||
|
||||
#ifdef CPU_MODEL_MK22FN512VLH12
|
||||
#include "vendor/MK22F51212.h"
|
||||
#else
|
||||
#error "undefined CPU_MODEL"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @name ARM Cortex-M specific CPU configuration
|
||||
* @{
|
||||
*/
|
||||
#define CPU_DEFAULT_IRQ_PRIO (1U)
|
||||
#define CPU_IRQ_NUMOF (89U)
|
||||
#define CPU_FLASH_BASE (0x00000000)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name GPIO pin mux function numbers
|
||||
* @{
|
||||
*/
|
||||
#define PIN_MUX_FUNCTION_ANALOG 0
|
||||
#define PIN_MUX_FUNCTION_GPIO 1
|
||||
/** @} */
|
||||
/**
|
||||
* @name GPIO interrupt flank settings
|
||||
* @{
|
||||
*/
|
||||
#define PIN_INTERRUPT_RISING 0b1001
|
||||
#define PIN_INTERRUPT_FALLING 0b1010
|
||||
#define PIN_INTERRUPT_EDGE 0b1011
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name Timer hardware information
|
||||
* @{
|
||||
*/
|
||||
#define LPTMR_CLKEN() (bit_set32(&SIM->SCGC5, SIM_SCGC5_LPTMR_SHIFT)) /**< Enable LPTMR0 clock gate */
|
||||
#define PIT_CLKEN() (bit_set32(&SIM->SCGC6, SIM_SCGC6_PIT_SHIFT)) /**< Enable PIT clock gate */
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CPU_CONF_H */
|
||||
/** @} */
|
||||
8478
cpu/k22f/include/vendor/MK22F10.h
vendored
Normal file
8478
cpu/k22f/include/vendor/MK22F10.h
vendored
Normal file
File diff suppressed because it is too large
Load Diff
15034
cpu/k22f/include/vendor/MK22F12.h
vendored
Normal file
15034
cpu/k22f/include/vendor/MK22F12.h
vendored
Normal file
File diff suppressed because it is too large
Load Diff
11774
cpu/k22f/include/vendor/MK22F12810.h
vendored
Normal file
11774
cpu/k22f/include/vendor/MK22F12810.h
vendored
Normal file
File diff suppressed because it is too large
Load Diff
12643
cpu/k22f/include/vendor/MK22F25612.h
vendored
Normal file
12643
cpu/k22f/include/vendor/MK22F25612.h
vendored
Normal file
File diff suppressed because it is too large
Load Diff
13050
cpu/k22f/include/vendor/MK22F51212.h
vendored
Normal file
13050
cpu/k22f/include/vendor/MK22F51212.h
vendored
Normal file
File diff suppressed because it is too large
Load Diff
16506
cpu/k22f/include/vendor/MK22FA12.h
vendored
Normal file
16506
cpu/k22f/include/vendor/MK22FA12.h
vendored
Normal file
File diff suppressed because it is too large
Load Diff
3
cpu/k22f/periph/Makefile
Normal file
3
cpu/k22f/periph/Makefile
Normal file
@ -0,0 +1,3 @@
|
||||
MODULE = periph
|
||||
|
||||
include $(RIOTBASE)/Makefile.base
|
||||
286
cpu/k22f/vectors.c
Normal file
286
cpu/k22f/vectors.c
Normal file
@ -0,0 +1,286 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Eistec AB
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||
* details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_k22f
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Interrupt vector definition for K22F MCUs
|
||||
*
|
||||
* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
|
||||
*
|
||||
* @}
|
||||
*/
|
||||
|
||||
#include "vectors_kinetis.h"
|
||||
|
||||
/* interrupt vector table */
|
||||
ISR_VECTORS const isr_func_t interrupt_vector[] = {
|
||||
/* Stack pointer */
|
||||
(isr_func_t)(&_estack), /* pointer to the top of the empty stack */
|
||||
/* Cortex-M4 handlers */
|
||||
reset_handler_default, /* entry point of the program */
|
||||
nmi_default, /* non maskable interrupt handler */
|
||||
hard_fault_default, /* hard fault exception */
|
||||
mem_manage_default, /* memory manage exception */
|
||||
bus_fault_default, /* bus fault exception */
|
||||
usage_fault_default, /* usage fault exception */
|
||||
dummy_handler, /* Reserved */
|
||||
dummy_handler, /* Reserved */
|
||||
dummy_handler, /* Reserved */
|
||||
dummy_handler, /* Reserved */
|
||||
isr_svc, /* system call interrupt, in RIOT used for
|
||||
* switching into thread context on boot */
|
||||
debug_mon_default, /* debug monitor exception */
|
||||
dummy_handler, /* Reserved */
|
||||
isr_pendsv, /* pendSV interrupt, in RIOT the actual
|
||||
* context switching is happening here */
|
||||
isr_systick, /* SysTick interrupt, not used in RIOT */
|
||||
/* K22F specific peripheral handlers */
|
||||
isr_dma0, /* DMA channel 0 transfer complete */
|
||||
isr_dma1, /* DMA channel 1 transfer complete */
|
||||
isr_dma2, /* DMA channel 2 transfer complete */
|
||||
isr_dma3, /* DMA channel 3 transfer complete */
|
||||
isr_dma4, /* DMA channel 4 transfer complete */
|
||||
isr_dma5, /* DMA channel 5 transfer complete */
|
||||
isr_dma6, /* DMA channel 6 transfer complete */
|
||||
isr_dma7, /* DMA channel 7 transfer complete */
|
||||
isr_dma8, /* DMA channel 8 transfer complete */
|
||||
isr_dma9, /* DMA channel 9 transfer complete */
|
||||
isr_dma10, /* DMA channel 10 transfer complete */
|
||||
isr_dma11, /* DMA channel 11 transfer complete */
|
||||
isr_dma12, /* DMA channel 12 transfer complete */
|
||||
isr_dma13, /* DMA channel 13 transfer complete */
|
||||
isr_dma14, /* DMA channel 14 transfer complete */
|
||||
isr_dma15, /* DMA channel 15 transfer complete */
|
||||
isr_dma_error, /* DMA channel 0 - 15 error */
|
||||
isr_mcm, /* MCM normal interrupt */
|
||||
isr_ftfl, /* FTFL command complete */
|
||||
isr_ftfl_collision, /* FTFL read collision */
|
||||
isr_pmc, /* PMC controller low-voltage detect low-voltage warning */
|
||||
isr_llwu, /* Low leakage wakeup */
|
||||
isr_wdog_ewm, /* Single interrupt vector for WDOG and EWM */
|
||||
isr_rng, /* Randon number generator */
|
||||
isr_i2c0, /* Inter-integrated circuit 0 */
|
||||
isr_i2c1, /* Inter-integrated circuit 1 */
|
||||
isr_spi0, /* Serial peripheral Interface 0 */
|
||||
isr_spi1, /* Serial peripheral Interface 1 */
|
||||
isr_i2s0_tx, /* Integrated interchip sound 0 transmit interrupt */
|
||||
isr_i2s0_rx, /* Integrated interchip sound 0 receive interrupt */
|
||||
isr_lpuart0, /* LPUART0 interrupt */
|
||||
isr_uart0_rx_tx, /* UART0 receive/transmit interrupt */
|
||||
isr_uart0_error, /* UART0 error interrupt */
|
||||
isr_uart1_rx_tx, /* UART1 receive/transmit interrupt */
|
||||
isr_uart1_error, /* UART1 error interrupt */
|
||||
isr_uart2_rx_tx, /* UART2 receive/transmit interrupt */
|
||||
isr_uart2_error, /* UART2 error interrupt */
|
||||
dummy_handler, /* Reserved interrupt */
|
||||
dummy_handler, /* Reserved interrupt */
|
||||
isr_adc0, /* Analog-to-digital converter 0 */
|
||||
isr_cmp0, /* Comparator 0 */
|
||||
isr_cmp1, /* Comparator 1 */
|
||||
isr_ftm0, /* FlexTimer module 0 fault overflow and channels interrupt */
|
||||
isr_ftm1, /* FlexTimer module 1 fault overflow and channels interrupt */
|
||||
isr_ftm2, /* FlexTimer module 2 fault overflow and channels interrupt */
|
||||
dummy_handler, /* Reserved interrupt */
|
||||
isr_rtc, /* Real time clock */
|
||||
isr_rtc_seconds, /* Real time clock seconds */
|
||||
isr_pit0, /* Periodic interrupt timer channel 0 */
|
||||
isr_pit1, /* Periodic interrupt timer channel 1 */
|
||||
isr_pit2, /* Periodic interrupt timer channel 2 */
|
||||
isr_pit3, /* Periodic interrupt timer channel 3 */
|
||||
isr_pdb0, /* Programmable delay block */
|
||||
isr_usb0, /* USB OTG interrupt */
|
||||
dummy_handler, /* Reserved interrupt */
|
||||
dummy_handler, /* Reserved interrupt */
|
||||
isr_dac0, /* Digital-to-analog converter 0 */
|
||||
isr_mcg, /* Multipurpose clock generator */
|
||||
isr_lptmr0, /* Low power timer interrupt */
|
||||
isr_porta, /* Port A pin detect interrupt */
|
||||
isr_portb, /* Port B pin detect interrupt */
|
||||
isr_portc, /* Port C pin detect interrupt */
|
||||
isr_portd, /* Port D pin detect interrupt */
|
||||
isr_porte, /* Port E pin detect interrupt */
|
||||
isr_swi, /* Software interrupt */
|
||||
dummy_handler, /* Reserved interrupt */
|
||||
dummy_handler, /* Reserved interrupt */
|
||||
dummy_handler, /* Reserved interrupt */
|
||||
dummy_handler, /* Reserved interrupt */
|
||||
dummy_handler, /* Reserved interrupt */
|
||||
dummy_handler, /* Reserved interrupt */
|
||||
isr_ftm3, /* FlexTimer module 3 fault overflow and channels interrupt */
|
||||
isr_dac1, /* Digital-to-analog converter 1 */
|
||||
isr_adc1, /* Analog-to-digital converter 1 */
|
||||
dummy_handler, /* reserved 90 */
|
||||
dummy_handler, /* reserved 91 */
|
||||
dummy_handler, /* reserved 92 */
|
||||
dummy_handler, /* reserved 93 */
|
||||
dummy_handler, /* reserved 94 */
|
||||
dummy_handler, /* reserved 95 */
|
||||
dummy_handler, /* reserved 96 */
|
||||
dummy_handler, /* reserved 97 */
|
||||
dummy_handler, /* reserved 98 */
|
||||
dummy_handler, /* reserved 99 */
|
||||
dummy_handler, /* reserved 100 */
|
||||
dummy_handler, /* reserved 101 */
|
||||
dummy_handler, /* reserved 102 */
|
||||
dummy_handler, /* reserved 103 */
|
||||
dummy_handler, /* reserved 104 */
|
||||
dummy_handler, /* reserved 105 */
|
||||
dummy_handler, /* reserved 106 */
|
||||
dummy_handler, /* reserved 107 */
|
||||
dummy_handler, /* reserved 108 */
|
||||
dummy_handler, /* reserved 109 */
|
||||
dummy_handler, /* reserved 110 */
|
||||
dummy_handler, /* reserved 111 */
|
||||
dummy_handler, /* reserved 112 */
|
||||
dummy_handler, /* reserved 113 */
|
||||
dummy_handler, /* reserved 114 */
|
||||
dummy_handler, /* reserved 115 */
|
||||
dummy_handler, /* reserved 116 */
|
||||
dummy_handler, /* reserved 117 */
|
||||
dummy_handler, /* reserved 118 */
|
||||
dummy_handler, /* reserved 119 */
|
||||
dummy_handler, /* reserved 120 */
|
||||
dummy_handler, /* reserved 121 */
|
||||
dummy_handler, /* reserved 122 */
|
||||
dummy_handler, /* reserved 123 */
|
||||
dummy_handler, /* reserved 124 */
|
||||
dummy_handler, /* reserved 125 */
|
||||
dummy_handler, /* reserved 126 */
|
||||
dummy_handler, /* reserved 127 */
|
||||
dummy_handler, /* reserved 128 */
|
||||
dummy_handler, /* reserved 129 */
|
||||
dummy_handler, /* reserved 130 */
|
||||
dummy_handler, /* reserved 131 */
|
||||
dummy_handler, /* reserved 132 */
|
||||
dummy_handler, /* reserved 133 */
|
||||
dummy_handler, /* reserved 134 */
|
||||
dummy_handler, /* reserved 135 */
|
||||
dummy_handler, /* reserved 136 */
|
||||
dummy_handler, /* reserved 137 */
|
||||
dummy_handler, /* reserved 138 */
|
||||
dummy_handler, /* reserved 139 */
|
||||
dummy_handler, /* reserved 140 */
|
||||
dummy_handler, /* reserved 141 */
|
||||
dummy_handler, /* reserved 142 */
|
||||
dummy_handler, /* reserved 143 */
|
||||
dummy_handler, /* reserved 144 */
|
||||
dummy_handler, /* reserved 145 */
|
||||
dummy_handler, /* reserved 146 */
|
||||
dummy_handler, /* reserved 147 */
|
||||
dummy_handler, /* reserved 148 */
|
||||
dummy_handler, /* reserved 149 */
|
||||
dummy_handler, /* reserved 150 */
|
||||
dummy_handler, /* reserved 151 */
|
||||
dummy_handler, /* reserved 152 */
|
||||
dummy_handler, /* reserved 153 */
|
||||
dummy_handler, /* reserved 154 */
|
||||
dummy_handler, /* reserved 155 */
|
||||
dummy_handler, /* reserved 156 */
|
||||
dummy_handler, /* reserved 157 */
|
||||
dummy_handler, /* reserved 158 */
|
||||
dummy_handler, /* reserved 159 */
|
||||
dummy_handler, /* reserved 160 */
|
||||
dummy_handler, /* reserved 161 */
|
||||
dummy_handler, /* reserved 162 */
|
||||
dummy_handler, /* reserved 163 */
|
||||
dummy_handler, /* reserved 164 */
|
||||
dummy_handler, /* reserved 165 */
|
||||
dummy_handler, /* reserved 166 */
|
||||
dummy_handler, /* reserved 167 */
|
||||
dummy_handler, /* reserved 168 */
|
||||
dummy_handler, /* reserved 169 */
|
||||
dummy_handler, /* reserved 170 */
|
||||
dummy_handler, /* reserved 171 */
|
||||
dummy_handler, /* reserved 172 */
|
||||
dummy_handler, /* reserved 173 */
|
||||
dummy_handler, /* reserved 174 */
|
||||
dummy_handler, /* reserved 175 */
|
||||
dummy_handler, /* reserved 176 */
|
||||
dummy_handler, /* reserved 177 */
|
||||
dummy_handler, /* reserved 178 */
|
||||
dummy_handler, /* reserved 179 */
|
||||
dummy_handler, /* reserved 180 */
|
||||
dummy_handler, /* reserved 181 */
|
||||
dummy_handler, /* reserved 182 */
|
||||
dummy_handler, /* reserved 183 */
|
||||
dummy_handler, /* reserved 184 */
|
||||
dummy_handler, /* reserved 185 */
|
||||
dummy_handler, /* reserved 186 */
|
||||
dummy_handler, /* reserved 187 */
|
||||
dummy_handler, /* reserved 188 */
|
||||
dummy_handler, /* reserved 189 */
|
||||
dummy_handler, /* reserved 190 */
|
||||
dummy_handler, /* reserved 191 */
|
||||
dummy_handler, /* reserved 192 */
|
||||
dummy_handler, /* reserved 193 */
|
||||
dummy_handler, /* reserved 194 */
|
||||
dummy_handler, /* reserved 195 */
|
||||
dummy_handler, /* reserved 196 */
|
||||
dummy_handler, /* reserved 197 */
|
||||
dummy_handler, /* reserved 198 */
|
||||
dummy_handler, /* reserved 199 */
|
||||
dummy_handler, /* reserved 200 */
|
||||
dummy_handler, /* reserved 201 */
|
||||
dummy_handler, /* reserved 202 */
|
||||
dummy_handler, /* reserved 203 */
|
||||
dummy_handler, /* reserved 204 */
|
||||
dummy_handler, /* reserved 205 */
|
||||
dummy_handler, /* reserved 206 */
|
||||
dummy_handler, /* reserved 207 */
|
||||
dummy_handler, /* reserved 208 */
|
||||
dummy_handler, /* reserved 209 */
|
||||
dummy_handler, /* reserved 210 */
|
||||
dummy_handler, /* reserved 211 */
|
||||
dummy_handler, /* reserved 212 */
|
||||
dummy_handler, /* reserved 213 */
|
||||
dummy_handler, /* reserved 214 */
|
||||
dummy_handler, /* reserved 215 */
|
||||
dummy_handler, /* reserved 216 */
|
||||
dummy_handler, /* reserved 217 */
|
||||
dummy_handler, /* reserved 218 */
|
||||
dummy_handler, /* reserved 219 */
|
||||
dummy_handler, /* reserved 220 */
|
||||
dummy_handler, /* reserved 221 */
|
||||
dummy_handler, /* reserved 222 */
|
||||
dummy_handler, /* reserved 223 */
|
||||
dummy_handler, /* reserved 224 */
|
||||
dummy_handler, /* reserved 225 */
|
||||
dummy_handler, /* reserved 226 */
|
||||
dummy_handler, /* reserved 227 */
|
||||
dummy_handler, /* reserved 228 */
|
||||
dummy_handler, /* reserved 229 */
|
||||
dummy_handler, /* reserved 230 */
|
||||
dummy_handler, /* reserved 231 */
|
||||
dummy_handler, /* reserved 232 */
|
||||
dummy_handler, /* reserved 233 */
|
||||
dummy_handler, /* reserved 234 */
|
||||
dummy_handler, /* reserved 235 */
|
||||
dummy_handler, /* reserved 236 */
|
||||
dummy_handler, /* reserved 237 */
|
||||
dummy_handler, /* reserved 238 */
|
||||
dummy_handler, /* reserved 239 */
|
||||
dummy_handler, /* reserved 240 */
|
||||
dummy_handler, /* reserved 241 */
|
||||
dummy_handler, /* reserved 242 */
|
||||
dummy_handler, /* reserved 243 */
|
||||
dummy_handler, /* reserved 244 */
|
||||
dummy_handler, /* reserved 245 */
|
||||
dummy_handler, /* reserved 246 */
|
||||
dummy_handler, /* reserved 247 */
|
||||
dummy_handler, /* reserved 248 */
|
||||
dummy_handler, /* reserved 249 */
|
||||
dummy_handler, /* reserved 250 */
|
||||
dummy_handler, /* reserved 251 */
|
||||
dummy_handler, /* reserved 252 */
|
||||
dummy_handler, /* reserved 253 */
|
||||
dummy_handler, /* reserved 254 */
|
||||
dummy_handler, /* reserved 255 */
|
||||
};
|
||||
@ -43,6 +43,11 @@ extern "C"
|
||||
#error Unknown CPU model. Update Makefile.include in the board directory.
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief This CPU provides an additional ADC clock divider as CFG1[ADICLK]=1
|
||||
*/
|
||||
#define KINETIS_HAVE_ADICLK_BUS_DIV_2 1
|
||||
|
||||
/**
|
||||
* @brief ARM Cortex-M specific CPU configuration
|
||||
* @{
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
# define the CPU architecture for the k64f
|
||||
export CPU_ARCH = cortex-m4
|
||||
export CPU_FAMILY = kx
|
||||
|
||||
# map CPU models to generic Kinetis linkerscript
|
||||
LD_MK64FN1M0VLL12 = kinetis_f1024l64u192.ld
|
||||
|
||||
@ -96,6 +96,7 @@ void isr_i2c2(void); /**< I2C2 interrupt handler */
|
||||
void isr_i2s0_rx(void); /**< I2S0 receive interrupt handler */
|
||||
void isr_i2s0_tx(void); /**< I2S0 transmit interrupt handler */
|
||||
void isr_llwu(void); /**< LLWU interrupt handler */
|
||||
void isr_lpuart0(void); /**< LPUART0 interrupt handler */
|
||||
void isr_lptmr0(void); /**< LPTMR0 interrupt handler */
|
||||
void isr_mcg(void); /**< MCG interrupt handler */
|
||||
void isr_mcm(void); /**< MCM interrupt handler */
|
||||
|
||||
@ -105,6 +105,7 @@ WEAK_DEFAULT void isr_i2s0_rx(void);
|
||||
WEAK_DEFAULT void isr_i2s0_tx(void);
|
||||
WEAK_DEFAULT void isr_llwu(void);
|
||||
WEAK_DEFAULT void isr_lptmr0(void);
|
||||
WEAK_DEFAULT void isr_lpuart0(void);
|
||||
WEAK_DEFAULT void isr_mcg(void);
|
||||
WEAK_DEFAULT void isr_mcm(void);
|
||||
WEAK_DEFAULT void isr_pdb0(void);
|
||||
|
||||
@ -70,10 +70,16 @@ static inline void prep(adc_t line)
|
||||
bit_set32(&SIM->SCGC6, SIM_SCGC6_ADC0_SHIFT);
|
||||
}
|
||||
#ifdef ADC1
|
||||
else {
|
||||
else if (dev(line) == ADC1) {
|
||||
#if defined(SIM_SCGC3_ADC1_SHIFT)
|
||||
bit_set32(&SIM->SCGC3, SIM_SCGC3_ADC1_SHIFT);
|
||||
}
|
||||
#elif defined(SIM_SCGC6_ADC1_SHIFT)
|
||||
bit_set32(&SIM->SCGC6, SIM_SCGC6_ADC1_SHIFT);
|
||||
#else
|
||||
#error ADC1 clock gate is not known!
|
||||
#endif
|
||||
}
|
||||
#endif /* ADC1 */
|
||||
mutex_lock(&locks[dev_num(line)]);
|
||||
}
|
||||
|
||||
@ -83,10 +89,14 @@ static inline void done(adc_t line)
|
||||
bit_clear32(&SIM->SCGC6, SIM_SCGC6_ADC0_SHIFT);
|
||||
}
|
||||
#ifdef ADC1
|
||||
else {
|
||||
else if (dev(line) == ADC1) {
|
||||
#if defined(SIM_SCGC3_ADC1_SHIFT)
|
||||
bit_clear32(&SIM->SCGC3, SIM_SCGC3_ADC1_SHIFT);
|
||||
}
|
||||
#elif defined(SIM_SCGC6_ADC1_SHIFT)
|
||||
bit_clear32(&SIM->SCGC6, SIM_SCGC6_ADC1_SHIFT);
|
||||
#endif
|
||||
}
|
||||
#endif /* ADC1 */
|
||||
mutex_unlock(&locks[dev_num(line)]);
|
||||
}
|
||||
|
||||
@ -161,7 +171,16 @@ int adc_init(adc_t line)
|
||||
/* For the calibration it is important that the ADC clock is <= 4 MHz */
|
||||
uint32_t adiv;
|
||||
if (CLOCK_BUSCLOCK > (ADC_MAX_CLK << 3)) {
|
||||
#if KINETIS_HAVE_ADICLK_BUS_DIV_2
|
||||
/* Some CPUs, e.g. MK60D10, MKW22D5, provide an additional divide by two
|
||||
* divider for the bus clock as CFG1[ADICLK] = 0b01
|
||||
*/
|
||||
adiv = ADC_CFG1_ADIV(3) | ADC_CFG1_ADICLK(1);
|
||||
#else
|
||||
/* Newer CPUs seem to have replaced this with various alternate clock
|
||||
* sources instead */
|
||||
adiv = ADC_CFG1_ADIV(3);
|
||||
#endif
|
||||
}
|
||||
else {
|
||||
unsigned int i = 0;
|
||||
|
||||
@ -51,6 +51,11 @@ extern "C"
|
||||
#define CPU_FLASH_BASE (0x00000000)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @brief This CPU provides an additional ADC clock divider as CFG1[ADICLK]=1
|
||||
*/
|
||||
#define KINETIS_HAVE_ADICLK_BUS_DIV_2 1
|
||||
|
||||
/**
|
||||
* @name GPIO pin mux function numbers
|
||||
*/
|
||||
|
||||
Loading…
Reference in New Issue
Block a user