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boards/nucleo-l452re: add ADC support

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krzysztof-cabaj 2024-07-05 09:16:17 +02:00
parent 4ba7c46e4d
commit 00114972ab
2 changed files with 15 additions and 0 deletions
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1
boards/nucleo-l452re/Makefile.features
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@ -2,6 +2,7 @@ CPU = stm32
CPU_MODEL = stm32l452re CPU_MODEL = stm32l452re
# Put defined MCU peripherals here (in alphabetical order) # Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_adc
FEATURES_PROVIDED += periph_i2c FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_pwm FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc FEATURES_PROVIDED += periph_rtc

14
boards/nucleo-l452re/include/periph_conf.h
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@ -120,6 +120,20 @@ static const spi_conf_t spi_config[] = {
#define SPI_NUMOF ARRAY_SIZE(spi_config) #define SPI_NUMOF ARRAY_SIZE(spi_config)
/** @} */ /** @} */
static const adc_conf_t adc_config[] = {
{ .pin = GPIO_PIN(PORT_A, 0), .dev = 0, .chan = 5 }, /* A0 ADC1_IN5 */
{ .pin = GPIO_PIN(PORT_A, 1), .dev = 0, .chan = 6 }, /* A1 ADC1_IN6 */
{ .pin = GPIO_PIN(PORT_A, 4), .dev = 0, .chan = 9 }, /* A2 ADC1_IN9 */
{ .pin = GPIO_PIN(PORT_B, 0), .dev = 0, .chan = 15 }, /* A3 ADC1_IN15 */
{ .pin = GPIO_PIN(PORT_C, 1), .dev = 0, .chan = 2 }, /* A4 ADC1_IN2 */
{ .pin = GPIO_PIN(PORT_C, 0), .dev = 0, .chan = 1 }, /* A5 ADC1_IN1 */
{ .pin = GPIO_UNDEF, .dev = 0, .chan = 18 },
};
#define ADC_NUMOF ARRAY_SIZE(adc_config)
#define VBAT_ADC ADC_LINE(6)
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif