RIOT/cpu/efm32/Makefile.features

include $(RIOTCPU)/efm32/efm32-info.mk
include $(RIOTCPU)/efm32/efm32-features.mk

CPU_CORE = $(EFM32_ARCHITECTURE)

# allow CPU families to add features individually
-include $(RIOTCPU)/efm32/families/$(CPU_FAM)/Makefile.features

# families without MPU
ifeq (,$(filter efm32zg efm32hg, $(CPU_FAM)))
  FEATURES_PROVIDED += cortexm_mpu
endif

FEATURES_PROVIDED += arch_efm32
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_flashpage
FEATURES_PROVIDED += periph_flashpage_in_address_space
FEATURES_PROVIDED += periph_flashpage_pagewise
FEATURES_PROVIDED += periph_gpio periph_gpio_irq
FEATURES_PROVIDED += periph_gpio_ll
FEATURES_PROVIDED += periph_gpio_ll_disconnect
FEATURES_PROVIDED += periph_gpio_ll_input_pull_down
FEATURES_PROVIDED += periph_gpio_ll_input_pull_up
FEATURES_PROVIDED += periph_gpio_ll_open_drain
FEATURES_PROVIDED += periph_gpio_ll_open_drain_pull_up
FEATURES_PROVIDED += periph_gpio_ll_open_source
FEATURES_PROVIDED += periph_gpio_ll_open_source_pull_down
FEATURES_PROVIDED += periph_rtt_set_counter
FEATURES_PROVIDED += periph_rtt_overflow
FEATURES_PROVIDED += periph_uart_modecfg
FEATURES_PROVIDED += periph_wdt

FEATURES_CONFLICT += periph_rtc:periph_rtt
FEATURES_CONFLICT_MSG += "On the EFM32, the RTC and RTT map to the same hardware peripheral."

FEATURES_CONFLICT += cortexm_fpu:gecko_sdk_librail_nonfpu
FEATURES_CONFLICT_MSG += "Using librail with the FPU enabled is not supported on this CPU."

ifeq (1,$(EFM32_TRNG))
  FEATURES_PROVIDED += periph_hwrng
endif

ifneq (,$(filter $(EFM32_SERIES),1 2))
  FEATURES_PROVIDED += periph_wdt_cb
endif

ifeq (1,$(EFM32_LEUART_ENABLED))
  CFLAGS += -DEFM32_LEUART_ENABLED=1
endif

include $(RIOTCPU)/cortexm_common/Makefile.features
cpu/efm32/Makefile.include: remove CPU_FAM and CPU_ARCH 2020-02-11 22:10:50 +01:00			`include $(RIOTCPU)/efm32/efm32-info.mk`
cpu: efm32: add support for non-standard UART modes. 2018-05-14 00:26:01 +02:00			`include $(RIOTCPU)/efm32/efm32-features.mk`

cpu: Rename CPU_ARCH to CPU_CORE 2020-06-10 13:11:32 +02:00			`CPU_CORE = $(EFM32_ARCHITECTURE)`
cpu/efm32/Makefile.include: remove CPU_FAM and CPU_ARCH 2020-02-11 22:10:50 +01:00
cpu/efm32/efr32*: model librail integration 2022-10-13 22:33:36 +02:00			`# allow CPU families to add features individually`
			`-include $(RIOTCPU)/efm32/families/$(CPU_FAM)/Makefile.features`

cpu/efm32: not every family has an MPU 2020-10-02 23:33:34 +02:00			`# families without MPU`
cpu/efm32: adapt MPU-capable cpus 2020-11-05 12:55:30 +01:00			`ifeq (,$(filter efm32zg efm32hg, $(CPU_FAM)))`
cpu/efm32: not every family has an MPU 2020-10-02 23:33:34 +02:00			`FEATURES_PROVIDED += cortexm_mpu`
			`endif`

cpu/efm32: provide arch_efm32 features 2019-11-16 14:07:53 +01:00			`FEATURES_PROVIDED += arch_efm32`
cpu: efm32_common: add peripheral drivers 2017-11-13 16:08:08 +01:00			`FEATURES_PROVIDED += periph_cpuid`
			`FEATURES_PROVIDED += periph_flashpage`
periph/flashpage: Add _in_address_space feature 2022-03-17 19:45:54 +01:00			`FEATURES_PROVIDED += periph_flashpage_in_address_space`
efm32: Adapt to flashpage/flashpage_pagewise API 2020-11-09 16:43:55 +01:00			`FEATURES_PROVIDED += periph_flashpage_pagewise`
cpu/efm32: provide gpio feature at cpu level 2019-10-17 21:46:27 +02:00			`FEATURES_PROVIDED += periph_gpio periph_gpio_irq`
cpu/efm32: Minimal support for gpio_ll 2022-04-27 10:57:58 +02:00			`FEATURES_PROVIDED += periph_gpio_ll`
drivers/periph_gpio_ll: Add features for compile-time-checks This adds the features - periph_gpio_ll_input_pull_down: To indicate support for input mode with internal pull down - periph_gpio_ll_input_pull_keep: To indicate support for input mode with internal resistor pulling towards current level - periph_gpio_ll_input_pull_up: To indicate support for input mode with internal pull up - periph_gpio_ll_disconnect: To indicate a GPIO can be disconnected - periph_gpio_ll_open_drain: To indicate support for open drain mode - periph_gpio_ll_open_drain_pull_up: To indicate support for open drain mode with internal pull up - periph_gpio_ll_open_source: To indicate support for open source mode - periph_gpio_ll_open_source_pull_down: To indicate support for open source mode with internal pull down 2024-01-23 09:05:13 +01:00			`FEATURES_PROVIDED += periph_gpio_ll_disconnect`
			`FEATURES_PROVIDED += periph_gpio_ll_input_pull_down`
			`FEATURES_PROVIDED += periph_gpio_ll_input_pull_up`
			`FEATURES_PROVIDED += periph_gpio_ll_open_drain`
			`FEATURES_PROVIDED += periph_gpio_ll_open_drain_pull_up`
			`FEATURES_PROVIDED += periph_gpio_ll_open_source`
			`FEATURES_PROVIDED += periph_gpio_ll_open_source_pull_down`
drivers/periph/rtt: add periph_rtt_set_counter feature Some periph_rtt implementations do not provide `rtt_set_counter()`. This adds `periph_rtt_set_counter` as feature to allow testing for its availability. The feature is provided at CPU level if periph_rtt is provided by the board for all CPUs implementing `rtt_set_counter()`. 2021-03-03 17:05:35 +01:00			`FEATURES_PROVIDED += periph_rtt_set_counter`
cpu: add periph_rtt_overflow feature The RTT overflow callback is not available on all RTT implementations. This means it is either a no-op or `rtt_set_overflow_cb()` is a no-op or it will overwrite the alarm set with `rtt_set_alarm()`. This adds a feature to indicate that proper overflow reporting is available. 2021-01-13 20:48:29 +01:00			`FEATURES_PROVIDED += periph_rtt_overflow`
cpu/efm32: provide periph_uart_modecfg feature for every board 2022-11-21 23:20:19 +01:00			`FEATURES_PROVIDED += periph_uart_modecfg`
cpu/efm32: add watchdog peripheral 2020-01-12 22:55:50 +01:00			`FEATURES_PROVIDED += periph_wdt`
cpu: efm32_common + ef32mg1p: replace with generalized efm32 cpu 2017-11-29 19:50:50 +01:00
cpu: efm32: mark rtc+rtt as conflict. 2018-04-11 18:39:59 +02:00			`FEATURES_CONFLICT += periph_rtc:periph_rtt`
			`FEATURES_CONFLICT_MSG += "On the EFM32, the RTC and RTT map to the same hardware peripheral."`

cpu/efm32/efr32*: model librail integration 2022-10-13 22:33:36 +02:00			`FEATURES_CONFLICT += cortexm_fpu:gecko_sdk_librail_nonfpu`
			`FEATURES_CONFLICT_MSG += "Using librail with the FPU enabled is not supported on this CPU."`

cpu/efm32/Makefile.features: fix typo 2020-02-11 22:09:50 +01:00			`ifeq (1,$(EFM32_TRNG))`
cpu: efm32_common + ef32mg1p: replace with generalized efm32 cpu 2017-11-29 19:50:50 +01:00			`FEATURES_PROVIDED += periph_hwrng`
			`endif`
cpu: efm32: fix for cpp support. 2018-05-07 21:32:41 +02:00
cpu/efm32/wdt: add series 2 support 2022-10-19 10:54:27 +02:00			`ifneq (,$(filter $(EFM32_SERIES),1 2))`
cpu/efm32: add watchdog peripheral 2020-01-12 22:55:50 +01:00			`FEATURES_PROVIDED += periph_wdt_cb`
			`endif`

cpu: efm32: move LOW_POWER_ENABLED to efm32-features.mk 2019-09-28 10:41:56 +02:00			`ifeq (1,$(EFM32_LEUART_ENABLED))`
			`CFLAGS += -DEFM32_LEUART_ENABLED=1`
			`endif`

cpu: efm32: fix for cpp support. 2018-05-07 21:32:41 +02:00			`include $(RIOTCPU)/cortexm_common/Makefile.features`