2016-02-26 17:05:57 +01:00
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/*
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* Copyright (C) 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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2019-07-07 13:05:43 +02:00
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* @ingroup boards_nucleo-f072rb
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2016-02-26 17:05:57 +01:00
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* @{
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*
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* @file
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2018-02-27 14:27:53 +01:00
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* @brief Peripheral MCU configuration for the nucleo-f072rb board
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2016-02-26 17:05:57 +01:00
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author José Ignacio Alamos <jialamos@uc.cl>
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*/
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2017-01-18 13:00:05 +01:00
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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2016-02-26 17:05:57 +01:00
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2020-08-30 16:50:03 +02:00
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/* HSE available on this board */
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#ifndef CONFIG_BOARD_HAS_HSE
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#define CONFIG_BOARD_HAS_HSE 1
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#endif
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2020-08-30 13:12:40 +02:00
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/* This board provides an LSE */
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2020-08-30 16:50:03 +02:00
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#ifndef CONFIG_BOARD_HAS_LSE
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#define CONFIG_BOARD_HAS_LSE 1
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#endif
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2020-08-30 13:12:40 +02:00
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2016-12-07 12:56:24 +01:00
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#include "periph_cpu.h"
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2020-12-16 14:43:18 +01:00
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#include "clk_conf.h"
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2018-12-20 17:41:18 +01:00
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#include "cfg_i2c1_pb8_pb9.h"
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2016-12-07 12:56:24 +01:00
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2016-02-26 17:05:57 +01:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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2017-01-26 18:14:32 +01:00
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* @name Timer configuration
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2016-02-26 17:05:57 +01:00
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* @{
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*/
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2016-12-07 12:56:24 +01:00
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static const timer_conf_t timer_config[] = {
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{
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2017-01-27 10:29:34 +01:00
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.dev = TIM1,
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2017-01-23 13:56:30 +01:00
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.max = 0x0000ffff,
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2017-01-27 10:29:34 +01:00
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.rcc_mask = RCC_APB2ENR_TIM1EN,
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2017-01-23 13:56:30 +01:00
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.bus = APB2,
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2017-01-27 10:29:34 +01:00
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.irqn = TIM1_CC_IRQn
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2016-12-07 12:56:24 +01:00
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}
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};
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2016-02-26 17:05:57 +01:00
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2017-01-27 10:29:34 +01:00
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#define TIMER_0_ISR isr_tim1_cc
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2016-12-07 12:56:24 +01:00
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2019-07-18 15:14:29 +02:00
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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2016-02-26 17:05:57 +01:00
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/** @} */
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/**
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2017-01-26 18:14:32 +01:00
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* @name UART configuration
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2016-12-07 17:03:52 +01:00
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* @{
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2016-02-26 17:05:57 +01:00
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*/
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2016-12-07 17:03:52 +01:00
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART2,
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.rcc_mask = RCC_APB1ENR_USART2EN,
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.rx_pin = GPIO_PIN(PORT_A, 3),
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.tx_pin = GPIO_PIN(PORT_A, 2),
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.rx_af = GPIO_AF1,
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.tx_af = GPIO_AF1,
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.bus = APB1,
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.irqn = USART2_IRQn
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},
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{
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.dev = USART1,
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.rcc_mask = RCC_APB2ENR_USART1EN,
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2017-01-23 13:56:52 +01:00
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.rx_pin = GPIO_PIN(PORT_A, 10),
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.tx_pin = GPIO_PIN(PORT_A, 9),
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.rx_af = GPIO_AF1,
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.tx_af = GPIO_AF1,
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2016-12-07 17:03:52 +01:00
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.bus = APB2,
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.irqn = USART1_IRQn
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2017-01-23 13:56:52 +01:00
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},
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{
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.dev = USART3,
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.rcc_mask = RCC_APB1ENR_USART3EN,
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.rx_pin = GPIO_PIN(PORT_C, 11),
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.tx_pin = GPIO_PIN(PORT_C, 10),
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.rx_af = GPIO_AF1,
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.tx_af = GPIO_AF1,
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.bus = APB1,
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.irqn = USART3_8_IRQn
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2016-12-07 17:03:52 +01:00
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}
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};
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2016-02-26 17:05:57 +01:00
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2016-12-07 17:03:52 +01:00
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#define UART_0_ISR (isr_usart2)
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#define UART_1_ISR (isr_usart1)
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2017-01-23 13:56:52 +01:00
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#define UART_2_ISR (isr_usart3_8)
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2016-12-07 17:03:52 +01:00
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2019-07-18 15:14:29 +02:00
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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2016-12-07 17:03:52 +01:00
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/** @} */
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2016-02-26 17:05:57 +01:00
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2017-01-23 13:56:30 +01:00
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/**
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2017-02-16 17:59:21 +01:00
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* @name PWM configuration
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2017-01-23 13:56:30 +01:00
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* @{
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*/
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static const pwm_conf_t pwm_config[] = {
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{
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.dev = TIM2,
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.rcc_mask = RCC_APB1ENR_TIM2EN,
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.chan = { { .pin = GPIO_PIN(PORT_B, 3) /* D3 */, .cc_chan = 1 },
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{ .pin = GPIO_PIN(PORT_B, 10) /* D6 */, .cc_chan = 2 },
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{ .pin = GPIO_PIN(PORT_B, 11) , .cc_chan = 3 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 } },
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.af = GPIO_AF2,
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.bus = APB1
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},
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{
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.dev = TIM3,
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.rcc_mask = RCC_APB1ENR_TIM3EN,
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.chan = { { .pin = GPIO_PIN(PORT_B, 4) /* D5 */, .cc_chan = 0 },
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{ .pin = GPIO_PIN(PORT_B, 5) /* D4 */, .cc_chan = 1 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 } },
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.af = GPIO_AF1,
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.bus = APB1
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},
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{
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.dev = TIM15,
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.rcc_mask = RCC_APB2ENR_TIM15EN,
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.chan = { { .pin = GPIO_PIN(PORT_B, 14), .cc_chan = 0 },
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{ .pin = GPIO_PIN(PORT_B, 15), .cc_chan = 1 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 } },
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.af = GPIO_AF1,
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.bus = APB2
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}
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};
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2019-07-18 15:14:29 +02:00
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#define PWM_NUMOF ARRAY_SIZE(pwm_config)
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2017-01-23 13:56:30 +01:00
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/** @} */
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2016-11-08 18:28:32 +01:00
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/**
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2017-01-26 18:14:32 +01:00
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* @name SPI configuration
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2016-11-08 18:28:32 +01:00
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = SPI1,
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.mosi_pin = GPIO_PIN(PORT_A, 7),
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.miso_pin = GPIO_PIN(PORT_A, 6),
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.sclk_pin = GPIO_PIN(PORT_A, 5),
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.cs_pin = GPIO_PIN(PORT_A, 4),
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2019-06-07 08:52:42 +02:00
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.mosi_af = GPIO_AF0,
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.miso_af = GPIO_AF0,
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.sclk_af = GPIO_AF0,
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.cs_af = GPIO_AF0,
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2016-11-08 18:28:32 +01:00
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.rccmask = RCC_APB2ENR_SPI1EN,
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.apbbus = APB2
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2018-08-15 11:58:19 +02:00
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},
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{
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.dev = SPI2,
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.mosi_pin = GPIO_PIN(PORT_B, 15),
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.miso_pin = GPIO_PIN(PORT_B, 14),
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.sclk_pin = GPIO_PIN(PORT_B, 13),
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.cs_pin = GPIO_PIN(PORT_B, 12),
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2019-06-07 08:52:42 +02:00
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.mosi_af = GPIO_AF0,
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.miso_af = GPIO_AF0,
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.sclk_af = GPIO_AF0,
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.cs_af = GPIO_AF0,
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2018-08-15 11:58:19 +02:00
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.rccmask = RCC_APB1ENR_SPI2EN,
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.apbbus = APB1
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},
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2016-11-08 18:28:32 +01:00
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};
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2019-07-18 15:14:29 +02:00
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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2016-11-08 18:28:32 +01:00
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/** @} */
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2016-02-26 17:05:57 +01:00
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/**
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2017-01-26 18:14:32 +01:00
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* @name ADC configuration
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2016-02-26 17:05:57 +01:00
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* @{
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*/
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2020-08-25 15:45:00 +02:00
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static const adc_conf_t adc_config[] = {
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{ GPIO_PIN(PORT_A, 0), 0 },
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{ GPIO_PIN(PORT_A, 1), 1 },
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{ GPIO_PIN(PORT_A, 4), 4 },
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{ GPIO_PIN(PORT_B, 0), 8 },
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{ GPIO_PIN(PORT_C, 1), 11 },
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2021-10-07 21:19:04 +02:00
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{ GPIO_PIN(PORT_C, 0), 10 },
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{ GPIO_UNDEF, 18 }, /* VBAT */
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2020-08-25 15:45:00 +02:00
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};
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2016-02-26 17:05:57 +01:00
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2021-10-07 21:19:04 +02:00
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#define VBAT_ADC ADC_LINE(6) /**< VBAT ADC line */
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2020-08-25 15:45:00 +02:00
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#define ADC_NUMOF ARRAY_SIZE(adc_config)
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2016-02-26 17:05:57 +01:00
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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2017-01-18 13:00:05 +01:00
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#endif /* PERIPH_CONF_H */
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2016-02-26 17:05:57 +01:00
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/** @} */
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