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121 lines
4.0 KiB
Plaintext
121 lines
4.0 KiB
Plaintext
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# Copyright (c) 2020 iosabi
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#
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# This file is subject to the terms and conditions of the GNU Lesser
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# General Public License v2.1. See the file LICENSE in the top level
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# directory for more details.
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#
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menu "QN908x clock configuration"
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depends on CPU_FAM_QN908X
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config BOARD_HAS_XTAL32K
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bool
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help
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Indicates that the board has an external low frequency 32.786 KHz
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crystal oscillator connected to the XTAL32_IN / XTAL32_OUT pins.
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This should only be set from board definition.
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choice
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prompt "32K low frequency clock selector"
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default CPU_CLK_32K_XTAL if BOARD_HAS_XTAL32K
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default CPU_CLK_32K_RCO
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help
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The "32K" clock bus runs at either 32 KHz from the internal RCO or
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32.768 KHz from an external crystal oscillator. This clock can be used
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to drive the "System clock" for a very low power operation, but it can
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independently also be used for the watchdog timer (WDT) and other low
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frequency system timers like a real time clock.
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config CPU_CLK_32K_XTAL
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bool "External 32.768 KHz crystal"
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depends on BOARD_HAS_XTAL32K
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config CPU_CLK_32K_RCO
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bool "Internal 32 KHz oscillator"
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endchoice
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config BOARD_HAS_XTAL
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bool
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help
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Indicates that the board has an external high frequency crystal
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oscillator connected to the XTAL_IN / XTAL_OUT pins.
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This should only be set from board definition.
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config BOARD_HAS_XTAL_16M
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bool
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imply BOARD_HAS_XTAL
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depends on !BOARD_HAS_XTAL_32M
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help
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Indicates that the external high frequency crystal oscillator is a
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16 MHz crystal. This should only be set from board definition.
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config BOARD_HAS_XTAL_32M
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bool
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imply BOARD_HAS_XTAL
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help
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Indicates that the external high frequency crystal oscillator is a
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32 MHz crystal. This should only be set from board definition.
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config CPU_CLK_OSC32M_DIV
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bool "Internal OSC32M clock input /2 divider"
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help
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Selecting this option will set the high-speed internal oscillator
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divider to /2, making it a 16 MHz clock source. See "System clock
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configuration selector" for selecting this source.
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config CPU_CLK_XTAL_DIV
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bool "External XTAL 32 MHz clock input /2 divider"
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depends on BOARD_HAS_XTAL_32M
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help
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Selecting this option will set the high-speed external crystal
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oscillator divider to /2. This option is only available when the
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external oscillator is a 32 MHz one. See "System clock
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configuration selector" for selecting this source.
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choice
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prompt "System clock configuration selector"
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default CPU_CLK_SYS_XTAL if BOARD_HAS_XTAL
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default CPU_CLK_SYS_OSC32M
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help
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The System clock is used to derive the AHB clock, which drives the ARM
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core and most peripherals.
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config CPU_CLK_SYS_XTAL
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bool "External 16/32 MHz crystal source (with optional divider)"
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depends on BOARD_HAS_XTAL
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config CPU_CLK_SYS_OSC32M
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bool "Internal 32 MHz oscillator source (with optional divider)"
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config CPU_CLK_SYS_32K
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bool "Low frequency clock source (32 or 32.768 KHz)"
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endchoice
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config CPU_CLK_AHB_DIV
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int "AHB clock divider"
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default 1
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range 1 8192
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help
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The AHB clock is derived from the System clock using this divider value,
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between 1 and 8192, and serves as a clock source for ARM core, FSP, SCT,
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Quad-SPI, Flexcomm (UART, SPI, I2C), GPIO, BLE_AHB and DMA.
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Note: When BLE is enabled, the AHB clock must be at least the BLE clock
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(either 8 or 16 MHz) limiting the range of allowed values for this
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divider so that the AHB clock is 8, 16 or 32 MHz.
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config CPU_CLK_APB_DIV
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int "APB clock divider"
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default 1
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range 1 16
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help
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The APB clock is derived from the AHB clock using this divide value,
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between 1 and 16, and serves as the clock source for several
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peripherals, such as the RTC, ADC, DAC, Capacitive Sense (CS) and
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optionally the WDT.
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# TODO: Add USB PLL and BLE clock selectors.
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endmenu
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