2014-04-17 19:40:22 +02:00
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @defgroup cpu_stm32f4 STM32F4
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* @ingroup cpu
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* @brief CPU specific implementations for the STM32F4
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* @{
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*
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* @file
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* @brief Implementation specific CPU configuration options
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*
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2017-01-19 21:45:23 +01:00
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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2014-04-17 19:40:22 +02:00
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*/
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2017-05-23 18:19:52 +02:00
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#ifndef CPU_CONF_H
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#define CPU_CONF_H
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2014-04-17 19:40:22 +02:00
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2016-01-14 23:21:49 +01:00
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#include "cpu_conf_common.h"
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2015-10-06 15:16:16 +02:00
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#if defined(CPU_MODEL_STM32F401RE)
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2017-03-06 16:28:11 +01:00
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#include "vendor/stm32f401xe.h"
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2015-10-06 15:16:16 +02:00
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#elif defined(CPU_MODEL_STM32F407VG)
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2017-03-06 16:28:11 +01:00
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#include "vendor/stm32f407xx.h"
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2017-02-03 13:28:22 +01:00
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#elif defined(CPU_MODEL_STM32F410RB)
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#include "vendor/stm32f410rx.h"
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2017-01-18 22:42:24 +01:00
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#elif defined(CPU_MODEL_STM32F411RE)
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2017-03-06 16:28:11 +01:00
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#include "vendor/stm32f411xe.h"
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2017-02-12 17:25:45 +01:00
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#elif defined(CPU_MODEL_STM32F412ZG)
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#include "vendor/stm32f412zx.h"
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2017-05-11 13:42:43 +02:00
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#elif defined(CPU_MODEL_STM32F413ZH) || defined(CPU_MODEL_STM32F413VG)
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2017-03-06 16:28:11 +01:00
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#include "vendor/stm32f413xx.h"
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2015-05-27 23:08:11 +02:00
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#elif defined(CPU_MODEL_STM32F415RG)
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2017-03-06 16:28:11 +01:00
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#include "vendor/stm32f415xx.h"
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2017-02-03 18:30:36 +01:00
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#elif defined(CPU_MODEL_STM32F446RE) || defined(CPU_MODEL_STM32F446ZE)
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2017-03-06 16:28:11 +01:00
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#include "vendor/stm32f446xx.h"
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2017-02-11 18:06:55 +01:00
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#elif defined(CPU_MODEL_STM32F429ZI)
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#include "vendor/stm32f429xx.h"
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2014-04-17 19:40:22 +02:00
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#endif
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2015-05-27 23:08:11 +02:00
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#ifdef __cplusplus
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extern "C" {
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2014-04-17 19:40:22 +02:00
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#endif
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/**
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2015-05-27 23:08:11 +02:00
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* @brief ARM Cortex-M specific CPU configuration
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2014-04-17 19:40:22 +02:00
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* @{
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*/
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2015-05-27 23:08:11 +02:00
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#define CPU_DEFAULT_IRQ_PRIO (1U)
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2017-08-20 17:21:16 +02:00
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#if defined(CPU_MODEL_STM32F401RE)
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#define CPU_IRQ_NUMOF (85U)
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#elif defined(CPU_MODEL_STM32F407VG) || defined(CPU_MODEL_STM32F415RG)
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2015-05-27 23:08:11 +02:00
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#define CPU_IRQ_NUMOF (82U)
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2017-08-20 17:21:16 +02:00
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#elif defined(CPU_MODEL_STM32F410RB)
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#define CPU_IRQ_NUMOF (98U)
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#elif defined(CPU_MODEL_STM32F411RE)
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#define CPU_IRQ_NUMOF (86U)
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#elif defined(CPU_MODEL_STM32F412ZG) || defined(CPU_MODEL_STM32F446RE) \
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|| defined(CPU_MODEL_STM32F446ZE)
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#define CPU_IRQ_NUMOF (97U)
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#elif defined(CPU_MODEL_STM32F413ZH) || defined(CPU_MODEL_STM32F413VG)
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#define CPU_IRQ_NUMOF (102U)
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#elif defined(CPU_MODEL_STM32F429ZI)
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#define CPU_IRQ_NUMOF (91U)
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2017-05-11 13:42:43 +02:00
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#endif
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2015-05-27 23:08:11 +02:00
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#define CPU_FLASH_BASE FLASH_BASE
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2014-04-17 19:40:22 +02:00
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/** @} */
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2014-10-13 10:53:20 +02:00
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#ifdef __cplusplus
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}
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#endif
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2017-05-23 18:19:52 +02:00
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#endif /* CPU_CONF_H */
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2014-04-17 19:40:22 +02:00
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/** @} */
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