2014-08-27 18:47:31 +02:00
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/*
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* Copyright (C) 2013, Freie Universitaet Berlin (FUB). All rights reserved.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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2010-09-22 15:10:42 +02:00
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#ifndef _CPU_H
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#define _CPU_H
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/**
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2013-11-27 17:54:30 +01:00
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* @defgroup msp430 TI MSP430
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* @ingroup cpu
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* @brief Texas Instruments MSP430 specific code
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2010-09-22 15:10:42 +02:00
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<h2>First steps</h2>
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2013-11-27 17:54:30 +01:00
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\li See the <a href="../manual/index.html">manual</a> for toolchain and ide setup
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2010-09-22 15:10:42 +02:00
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* @{
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*/
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#include <stdio.h>
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2013-03-30 21:44:16 +01:00
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#include <legacymsp430.h>
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2013-12-09 11:12:39 +01:00
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#include <msp430.h>
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2013-12-16 17:54:58 +01:00
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#include "board.h"
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2013-12-09 11:12:39 +01:00
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#include "sched.h"
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#include "msp430_types.h"
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#include "cpu-conf.h"
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2010-09-22 15:10:42 +02:00
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#define WORDSIZE 16
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extern volatile int __inISR;
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extern char __isr_stack[MSP430_ISR_STACK_SIZE];
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//#define eINT() eint()
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//#define dINT() dint()
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2013-06-21 03:52:57 +02:00
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inline void __save_context_isr(void)
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{
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2010-09-22 15:10:42 +02:00
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__asm__("push r15");
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__asm__("push r14");
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__asm__("push r13");
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__asm__("push r12");
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__asm__("push r11");
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__asm__("push r10");
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__asm__("push r9");
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__asm__("push r8");
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__asm__("push r7");
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__asm__("push r6");
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__asm__("push r5");
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__asm__("push r4");
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2014-04-10 22:28:35 +02:00
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__asm__("mov.w r1,%0" : "=r"(sched_active_thread->sp));
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2010-09-22 15:10:42 +02:00
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}
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2013-06-21 03:52:57 +02:00
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inline void __restore_context_isr(void)
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{
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2014-04-10 22:28:35 +02:00
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__asm__("mov.w %0,r1" : : "m"(sched_active_thread->sp));
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2010-09-22 15:10:42 +02:00
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__asm__("pop r4");
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__asm__("pop r5");
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__asm__("pop r6");
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__asm__("pop r7");
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__asm__("pop r8");
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__asm__("pop r9");
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__asm__("pop r10");
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__asm__("pop r11");
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__asm__("pop r12");
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__asm__("pop r13");
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__asm__("pop r14");
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__asm__("pop r15");
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}
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2013-06-21 03:52:57 +02:00
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inline void __enter_isr(void)
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{
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2010-09-22 15:10:42 +02:00
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__save_context_isr();
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2013-06-21 03:52:57 +02:00
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__asm__("mov.w %0,r1" : : "i"(__isr_stack+MSP430_ISR_STACK_SIZE));
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2010-09-22 15:10:42 +02:00
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__inISR = 1;
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}
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2013-06-21 03:52:57 +02:00
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inline void __exit_isr(void)
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{
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2010-09-22 15:10:42 +02:00
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__inISR = 0;
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2013-06-21 03:52:57 +02:00
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2013-06-24 22:37:35 +02:00
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if (sched_context_switch_request) {
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2013-06-21 03:52:57 +02:00
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sched_run();
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}
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2010-09-22 15:10:42 +02:00
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__restore_context_isr();
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__asm__("reti");
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}
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2013-06-21 03:52:57 +02:00
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inline void __save_context(void)
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{
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2010-09-22 15:10:42 +02:00
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__asm__("push r2"); /* save SR */
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__save_context_isr();
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}
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2014-08-26 14:28:01 +02:00
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inline void __restore_context(unsigned int irqen)
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2013-06-21 03:52:57 +02:00
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{
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2010-09-22 15:10:42 +02:00
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__restore_context_isr();
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2014-08-26 14:28:01 +02:00
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/* we want to enable if appropriate IRQs *just after*
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quitting the interrupt handler; to that end,
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we change the GIE bit in the value to be restored
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in R2 (a.k.a. SR) by the next RETI instruction */
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if (irqen) {
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__asm__("bis.w #8, 0(r1)");
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} else {
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__asm__("bic.w #8, 0(r1)");
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}
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2010-09-22 15:10:42 +02:00
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__asm__("reti");
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}
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2013-06-21 03:52:57 +02:00
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inline void eINT(void)
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{
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// puts("+");
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2010-09-22 15:10:42 +02:00
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eint();
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}
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2013-06-21 03:52:57 +02:00
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inline void dINT(void)
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{
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// puts("-");
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2010-09-22 15:10:42 +02:00
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dint();
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}
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2013-02-11 22:10:03 +01:00
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int inISR(void);
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2010-09-22 15:10:42 +02:00
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2013-08-14 23:46:51 +02:00
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void msp430_cpu_init(void);
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2010-09-22 15:10:42 +02:00
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/** @} */
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#endif // _CPU_H
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