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RIOT/cpu/msp430/include/irq_arch.h
Marian Buschsieweke ff7f8ae2f0
cpu/msp430: reorganize code
RIOT supports two distinct families of the MSP430: The [MSP430 x1xx]
MCU family and the [MSP430 F2xx/G2xx] MCU family. For both incompatible
MCU families the code was located in the msp430fxyz folder, resulting
in case of the UART driver in particularly bizarre code looking roughly
like this:

    #ifndef UART_USE_USCI
    /* implementation of x1xx peripheral ... */
    #else
    /* implementation of F2xx/G2xx peripheral ... */
    #endif
    /* zero shared code between both variants */

This splits the peripheral drivers for USCI and USART serial IP blocks
into separate files and relocates everything in cpu/msp430, similar to
how cpu/stm32 is organized.

[MSP430 x1xx]: https://www.ti.com/lit/ug/slau049f/slau049f.pdf
[MSP430 F2xx/G2xx]: https://www.ti.com/lit/ug/slau144k/slau144k.pdf
2023-06-19 17:14:57 +02:00

111 lines
2.6 KiB
C

/*
* Copyright (C) 2014 Freie Universität Berlin
* 2020 Otto-von-Guericke-Universität Magdeburg
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_msp430
* @{
*
* @file
* @brief ISR related functions
*
* @author Kaspar Schleiser <kaspar@schleiser.de>
* @author Oliver Hahm <oliver.hahm@inria.fr>
* @author Marian Buschsieweke <marian.buschsieweke@ovgu.de>
*
*/
#ifndef IRQ_ARCH_H
#define IRQ_ARCH_H
#include <stdbool.h>
#include <msp430.h>
#include "irq.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
* gcc warns for missing NOPs before/after interrupt enable/disable.
* so I added the NOP instructions, even though they might not be necessary
* due to following AND. // Kaspar
*/
extern volatile int __irq_is_in;
#define _GENERAL_INTERRUPT_ENABLE (0x0008)
__attribute__((always_inline)) static inline unsigned int irq_disable(void)
{
unsigned int state;
__asm__ volatile(
"mov.w r2, %[state]" "\n\t"
"bic %[gie], r2" "\n\t"
"nop" "\n\t"
"and %[gie], %[state]" "\n\t"
: [state] "=r"(state)
: [gie] "i"(_GENERAL_INTERRUPT_ENABLE)
: "memory"
);
return state;
}
__attribute__((always_inline)) static inline unsigned int irq_enable(void)
{
unsigned int state;
__asm__ volatile(
"mov.w r2, %[state]" "\n\t"
"nop" "\n\t"
"bis %[gie], r2" "\n\t"
"nop" "\n\t"
"and %[gie], %[state]" "\n\t"
: [state] "=r"(state)
: [gie] "i"(_GENERAL_INTERRUPT_ENABLE)
: "memory"
);
return state;
}
__attribute__((always_inline)) static inline void irq_restore(unsigned int state)
{
__asm__ volatile(
"bis %[state], r2" "\n\t"
"nop" "\n\t"
: /* no outputs */
: [state] "r"(state)
: "memory"
);
}
__attribute__((always_inline)) static inline bool irq_is_in(void)
{
return __irq_is_in;
}
__attribute__((always_inline)) static inline bool irq_is_enabled(void)
{
unsigned int state;
__asm__ volatile(
"mov.w r2,%[state]" "\n\t"
: [state] "=r"(state)
: /* no inputs */
: "memory"
);
return (state & GIE);
}
#ifdef __cplusplus
}
#endif
/** @} */
#endif /* IRQ_ARCH_H */