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126 lines
5.1 KiB
C
126 lines
5.1 KiB
C
/*
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* Copyright (C) 2014-2017 Freie Universität Berlin
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* 2017 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_stm32l0
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* @{
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*
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* @file
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* @brief Interrupt vector definitions
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*
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* @}
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*/
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#include <stdint.h>
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#include "vectors_cortexm.h"
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/* get the start of the ISR stack as defined in the linkerscript */
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extern uint32_t _estack;
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/* define a local dummy handler as it needs to be in the same compilation unit
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* as the alias definition */
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void dummy_handler(void) {
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dummy_handler_default();
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}
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/* Cortex-M common interrupt vectors */
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WEAK_DEFAULT void isr_svc(void);
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WEAK_DEFAULT void isr_pendsv(void);
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WEAK_DEFAULT void isr_systick(void);
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/* STM32L0 specific interrupt vectors */
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WEAK_DEFAULT void isr_wwdg(void);
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WEAK_DEFAULT void isr_pvd(void);
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WEAK_DEFAULT void isr_rtc(void);
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WEAK_DEFAULT void isr_flash(void);
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WEAK_DEFAULT void isr_rcc(void);
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WEAK_DEFAULT void isr_exti(void);
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WEAK_DEFAULT void isr_ts(void);
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WEAK_DEFAULT void isr_dma1_ch1(void);
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WEAK_DEFAULT void isr_dma1_ch2_3(void);
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WEAK_DEFAULT void isr_dma1_ch4_5_6_7(void);
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WEAK_DEFAULT void isr_adc1_comp(void);
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WEAK_DEFAULT void isr_lptim1(void);
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WEAK_DEFAULT void isr_usart4_5(void);
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WEAK_DEFAULT void isr_tim2(void);
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WEAK_DEFAULT void isr_tim3(void);
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WEAK_DEFAULT void isr_tim6_dac(void);
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WEAK_DEFAULT void isr_tim7(void);
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WEAK_DEFAULT void isr_tim21(void);
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WEAK_DEFAULT void isr_i2c3(void);
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WEAK_DEFAULT void isr_tim22(void);
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WEAK_DEFAULT void isr_i2c1(void);
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WEAK_DEFAULT void isr_i2c2(void);
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WEAK_DEFAULT void isr_spi1(void);
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WEAK_DEFAULT void isr_spi2(void);
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WEAK_DEFAULT void isr_usart1(void);
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WEAK_DEFAULT void isr_usart2(void);
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WEAK_DEFAULT void isr_rng_lpuart1(void);
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WEAK_DEFAULT void isr_lcd(void);
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WEAK_DEFAULT void isr_usb(void);
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/* interrupt vector table */
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ISR_VECTORS const void *interrupt_vector[] = {
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/* Exception stack pointer */
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(void*) (&_estack), /* pointer to the top of the stack */
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/* Cortex-M0 handlers */
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(void*) reset_handler_default, /* entry point of the program */
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(void*) nmi_default, /* non maskable interrupt handler */
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(void*) hard_fault_default, /* hard fault exception */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) isr_svc, /* system call interrupt, in RIOT used for
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* switching into thread context on boot */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
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* context switching is happening here */
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(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
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/* STM specific peripheral handlers */
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(void*) isr_wwdg, /* windowed watchdog */
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(void*) isr_pvd, /* power control */
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(void*) isr_rtc, /* real time clock */
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(void*) isr_flash, /* flash memory controller */
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(void*) isr_rcc, /* reset and clock control */
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(void*) isr_exti, /* external interrupt lines 0 and 1 */
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(void*) isr_exti, /* external interrupt lines 2 and 3 */
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(void*) isr_exti, /* external interrupt lines 4 to 15 */
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(void*) isr_ts, /* touch sensing input*/
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(void*) isr_dma1_ch1, /* direct memory access controller 1, channel 1*/
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(void*) isr_dma1_ch2_3, /* direct memory access controller 1, channel 2 and 3*/
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(void*) isr_dma1_ch4_5_6_7, /* direct memory access controller 1, channel 4, 5, 6 and 7*/
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(void*) isr_adc1_comp, /* analog digital converter */
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(void*) isr_lptim1, /* low power timer 1 */
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(void*) isr_usart4_5, /* usart 4 to 5 */
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(void*) isr_tim2, /* timer 2 */
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(void*) isr_tim3, /* timer 3 */
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(void*) isr_tim6_dac, /* timer 6 and digital to analog converter */
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(void*) isr_tim7, /* timer 7 */
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(void*) (0UL), /* reserved */
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(void*) isr_tim21, /* timer 21 */
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(void*) isr_i2c3, /* I2C 3 */
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(void*) isr_tim22, /* timer 22 */
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(void*) isr_i2c1, /* I2C 1 */
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(void*) isr_i2c2, /* I2C 2 */
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(void*) isr_spi1, /* SPI 1 */
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(void*) isr_spi2, /* SPI 2 */
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(void*) isr_usart1, /* USART 1 */
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(void*) isr_usart2, /* USART 2 */
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(void*) isr_rng_lpuart1, /* Low power UART 1 */
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(void*) isr_lcd, /* LCD */
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(void*) isr_usb /* USB */
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};
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