mirror of
https://github.com/RIOT-OS/RIOT.git
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322 lines
9.3 KiB
C
322 lines
9.3 KiB
C
/*
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* Copyright (C) 2014-2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_udoo
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the UDOO board
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef PERIPH_CONF_H_
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#define PERIPH_CONF_H_
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock configuration
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* @{
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*/
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#define CLOCK_CORECLOCK (84000000U)
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/** @} */
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/**
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* @name Timer peripheral configuration
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* @{
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*/
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#define TIMER_NUMOF (3U)
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#define TIMER_0_EN 1
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#define TIMER_1_EN 1
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#define TIMER_2_EN 1
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/* Timer 0 configuration */
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#define TIMER_0_DEV TC0
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#define TIMER_0_CHANNELS 6
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#define TIMER_0_MAX_VALUE (0xffffffff)
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#define TIMER_0_ISR1 isr_tc0
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#define TIMER_0_ISR2 isr_tc1
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/* Timer 1 configuration */
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#define TIMER_1_DEV TC1
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#define TIMER_1_CHANNELS 6
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#define TIMER_1_MAX_VALUE (0xffffffff)
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#define TIMER_1_ISR1 isr_tc3
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#define TIMER_1_ISR2 isr_tc4
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/* Timer 2 configuration */
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#define TIMER_2_DEV TC2
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#define TIMER_2_CHANNELS 6
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#define TIMER_2_MAX_VALUE (0xffffffff)
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#define TIMER_2_ISR1 isr_tc6
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#define TIMER_2_ISR2 isr_tc7
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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/* device, rx port, tx port, rx pin, tx pin, mux, PMC bit, IRGn line */
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{(Uart *)UART, PIOA, PIOA, 8, 9, GPIO_MUX_A, ID_UART, UART_IRQn},
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{(Uart *)USART0, PIOA, PIOA, 10, 11, GPIO_MUX_A, ID_USART0, USART0_IRQn},
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{(Uart *)USART1, PIOA, PIOA, 12, 13, GPIO_MUX_A, ID_USART1, USART1_IRQn},
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{(Uart *)USART3, PIOD, PIOD, 4, 5, GPIO_MUX_B, ID_USART3, USART3_IRQn}
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};
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/* define interrupt vectors */
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#define UART_0_ISR isr_uart
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#define UART_1_ISR isr_usart0
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#define UART_2_ISR isr_usart1
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#define UART_3_ISR isr_usart3
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#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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#define SPI_NUMOF (1U)
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#define SPI_0_EN 1
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/* SPI 0 device config */
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#define SPI_0_DEV SPI0
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#define SPI_0_CLKEN() (PMC->PMC_PCER0 |= (1 << ID_SPI0));
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#define SPI_0_CLKDIS() (PMC->PMC_PCER0 &= ~(1 << ID_SPI0));
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#define SPI_0_IRQ SPI0_IRQn
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#define SPI_0_IRQ_HANDLER isr_spi0
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#define SPI_0_IRQ_PRIO 1
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/* SPI 0 pin configuration */
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#define SPI_0_MISO_PIN PIO_PA25A_SPI0_MISO
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#define SPI_0_MOSI_PIN PIO_PA26A_SPI0_MOSI
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#define SPI_0_SCK_PIN PIO_PA27A_SPI0_SPCK
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#define SPI_0_MISO_PORT PIOA
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#define SPI_0_MOSI_PORT PIOA
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#define SPI_0_SCK_PORT PIOA
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#define SPI_0_MISO_PORT_CLKEN() (PMC->PMC_PCER0 |= (1 << ID_PIOA));
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#define SPI_0_MOSI_PORT_CLKEN() (PMC->PMC_PCER0 |= (1 << ID_PIOA));
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#define SPI_0_SCK_PORT_CLKEN() (PMC->PMC_PCER0 |= (1 << ID_PIOA));
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/** @} */
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/**
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* @name GPIO configuration
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* @{
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*/
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#define GPIO_0_EN 1
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#define GPIO_1_EN 1
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#define GPIO_2_EN 1
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#define GPIO_3_EN 1
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#define GPIO_4_EN 1
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#define GPIO_5_EN 1
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#define GPIO_6_EN 1
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#define GPIO_7_EN 1
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#define GPIO_8_EN 1
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#define GPIO_9_EN 1
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#define GPIO_10_EN 1
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#define GPIO_11_EN 1
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#define GPIO_12_EN 1
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#define GPIO_13_EN 1
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#define GPIO_14_EN 1
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#define GPIO_15_EN 1
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#define GPIO_16_EN 1
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#define GPIO_17_EN 1
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#define GPIO_18_EN 1
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#define GPIO_19_EN 1
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#define GPIO_20_EN 1
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#define GPIO_21_EN 1
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#define GPIO_22_EN 1
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#define GPIO_23_EN 1
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#define GPIO_24_EN 1
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#define GPIO_25_EN 1
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#define GPIO_26_EN 1
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#define GPIO_27_EN 1
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#define GPIO_28_EN 1
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#define GPIO_29_EN 1
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#define GPIO_30_EN 1
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#define GPIO_31_EN 1
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#define GPIO_IRQ_PRIO 1
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/* GPIO channel 0 config */
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#define GPIO_0_DEV PIOA
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#define GPIO_0_PIN PIO_PA14
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#define GPIO_0_IRQ PIOA_IRQn
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#define GPIO_A14_MAP 0
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/* GPIO channel 1 config */
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#define GPIO_1_DEV PIOD
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#define GPIO_1_PIN PIO_PD0
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#define GPIO_1_IRQ PIOD_IRQn
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#define GPIO_D0_MAP 1
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/* GPIO channel 2 config */
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#define GPIO_2_DEV PIOD
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#define GPIO_2_PIN PIO_PD2
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#define GPIO_2_IRQ PIOD_IRQn
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#define GPIO_D2_MAP 2
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/* GPIO channel 3 config */
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#define GPIO_3_DEV PIOD
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#define GPIO_3_PIN PIO_PD6
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#define GPIO_3_IRQ PIOD_IRQn
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#define GPIO_D6_MAP 3
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/* GPIO channel 4 config */
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#define GPIO_4_DEV PIOA
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#define GPIO_4_PIN PIO_PA7
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#define GPIO_4_IRQ PIOA_IRQn
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#define GPIO_A7_MAP 4
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/* GPIO channel 5 config */
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#define GPIO_5_DEV PIOC
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#define GPIO_5_PIN PIO_PC1
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#define GPIO_5_IRQ PIOC_IRQn
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#define GPIO_C1_MAP 5
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/* GPIO channel 6 config */
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#define GPIO_6_DEV PIOC
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#define GPIO_6_PIN PIO_PC3
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#define GPIO_6_IRQ PIOC_IRQn
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#define GPIO_C3_MAP 6
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/* GPIO channel 7 config */
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#define GPIO_7_DEV PIOC
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#define GPIO_7_PIN PIO_PC5
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#define GPIO_7_IRQ PIOC_IRQn
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#define GPIO_C5_MAP 7
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/* GPIO channel 8 config */
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#define GPIO_8_DEV PIOC
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#define GPIO_8_PIN PIO_PC7
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#define GPIO_8_IRQ PIOC_IRQn
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#define GPIO_C7_MAP 8
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/* GPIO channel 9 config */
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#define GPIO_9_DEV PIOC
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#define GPIO_9_PIN PIO_PC9
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#define GPIO_9_IRQ PIOC_IRQn
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#define GPIO_C9_MAP 9
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/* GPIO channel 10 config */
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#define GPIO_10_DEV PIOA
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#define GPIO_10_PIN PIO_PA20
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#define GPIO_10_IRQ PIOA_IRQn
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#define GPIO_A20_MAP 10
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/* GPIO channel 11 config */
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#define GPIO_11_DEV PIOC
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#define GPIO_11_PIN PIO_PC18
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#define GPIO_11_IRQ PIOC_IRQn
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#define GPIO_C18_MAP 11
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/* GPIO channel 12 config */
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#define GPIO_12_DEV PIOC
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#define GPIO_12_PIN PIO_PC16
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#define GPIO_12_IRQ PIOC_IRQn
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#define GPIO_C16_MAP 12
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/* GPIO channel 13 config */
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#define GPIO_13_DEV PIOC
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#define GPIO_13_PIN PIO_PC14
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#define GPIO_13_IRQ PIOC_IRQn
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#define GPIO_C14_MAP 13
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/* GPIO channel 14 config */
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#define GPIO_14_DEV PIOC
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#define GPIO_14_PIN PIO_PC12
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#define GPIO_14_IRQ PIOC_IRQn
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#define GPIO_C12_MAP 14
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/* GPIO channel 15 config */
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#define GPIO_15_DEV PIOB
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#define GPIO_15_PIN PIO_PB14
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#define GPIO_15_IRQ PIOB_IRQn
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#define GPIO_B14_MAP 15
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/* GPIO channel 16 config */
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#define GPIO_16_DEV PIOB
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#define GPIO_16_PIN PIO_PB26
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#define GPIO_16_IRQ PIOB_IRQn
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#define GPIO_B26_MAP 16
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/* GPIO channel 17 config */
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#define GPIO_17_DEV PIOA
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#define GPIO_17_PIN PIO_PA15
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#define GPIO_17_IRQ PIOA_IRQn
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#define GPIO_A15_MAP 17
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/* GPIO channel 18 config */
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#define GPIO_18_DEV PIOD
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#define GPIO_18_PIN PIO_PD1
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#define GPIO_18_IRQ PIOD_IRQn
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#define GPIO_D1_MAP 18
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/* GPIO channel 19 config */
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#define GPIO_19_DEV PIOD
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#define GPIO_19_PIN PIO_PD3
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#define GPIO_19_IRQ PIOD_IRQn
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#define GPIO_D3_MAP 19
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/* GPIO channel 20 config */
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#define GPIO_20_DEV PIOD
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#define GPIO_20_PIN PIO_PD9
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#define GPIO_20_IRQ PIOD_IRQn
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#define GPIO_D9_MAP 20
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/* GPIO channel 21 config */
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#define GPIO_21_DEV PIOD
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#define GPIO_21_PIN PIO_PD10
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#define GPIO_21_IRQ PIOD_IRQn
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#define GPIO_D10_MAP 21
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/* GPIO channel 22 config */
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#define GPIO_22_DEV PIOC
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#define GPIO_22_PIN PIO_PC2
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#define GPIO_22_IRQ PIOC_IRQn
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#define GPIO_C2_MAP 22
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/* GPIO channel 23 config */
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#define GPIO_23_DEV PIOC
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#define GPIO_23_PIN PIO_PC4
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#define GPIO_23_IRQ PIOC_IRQn
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#define GPIO_C4_MAP 23
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/* GPIO channel 24 config */
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#define GPIO_24_DEV PIOC
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#define GPIO_24_PIN PIO_PC6
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#define GPIO_24_IRQ PIOC_IRQn
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#define GPIO_C6_MAP 24
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/* GPIO channel 25 config */
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#define GPIO_25_DEV PIOC
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#define GPIO_25_PIN PIO_PC8
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#define GPIO_25_IRQ PIOC_IRQn
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#define GPIO_C8_MAP 25
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/* GPIO channel 26 config */
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#define GPIO_26_DEV PIOA
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#define GPIO_26_PIN PIO_PA19
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#define GPIO_26_IRQ PIOA_IRQn
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#define GPIO_A19_MAP 26
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/* GPIO channel 27 config */
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#define GPIO_27_DEV PIOC
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#define GPIO_27_PIN PIO_PC19
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#define GPIO_27_IRQ PIOC_IRQn
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#define GPIO_C19_MAP 27
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/* GPIO channel 28 config */
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#define GPIO_28_DEV PIOC
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#define GPIO_28_PIN PIO_PC17
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#define GPIO_28_IRQ PIOC_IRQn
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#define GPIO_C17_MAP 28
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/* GPIO channel 29 config */
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#define GPIO_29_DEV PIOC
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#define GPIO_29_PIN PIO_PC15
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#define GPIO_29_IRQ PIOC_IRQn
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#define GPIO_C15_MAP 29
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/* GPIO channel 30 config */
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#define GPIO_30_DEV PIOC
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#define GPIO_30_PIN PIO_PC13
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#define GPIO_30_IRQ PIOC_IRQn
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#define GPIO_C13_MAP 30
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/* GPIO channel 31 config */
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#define GPIO_31_DEV PIOB
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#define GPIO_31_PIN PIO_PB21
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#define GPIO_31_IRQ PIOB_IRQn
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#define GPIO_B21_MAP 31
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H_ */
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/** @} */
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