mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
dc958b3b38
- stm32f7 use sectors instead of pages, they go either from 16KB to 128KB, or from 32KB to 25KB. Smaller sectors are at the begining of the flash. Slots must start at the begining of a sector to not overlap. - Minimum required RIOBOOT_HDR_LEN or stm32f7 is 0x200 to respect vector table alignment - Add CPU_FLASH_BASE
55 lines
1.2 KiB
C
55 lines
1.2 KiB
C
/*
|
|
* Copyright (C) 2017 Freie Universität Berlin
|
|
* 2017 Inria
|
|
*
|
|
* This file is subject to the terms and conditions of the GNU Lesser General
|
|
* Public License v2.1. See the file LICENSE in the top level directory for more
|
|
* details.
|
|
*/
|
|
|
|
/**
|
|
* @defgroup cpu_stm32f7 STM32F7
|
|
* @brief STM32F7 specific code
|
|
* @ingroup cpu
|
|
* @{
|
|
*
|
|
* @file
|
|
* @brief Implementation specific CPU configuration options
|
|
*
|
|
* @author Hauke Petersen <hauke.pertersen@fu-berlin.de>
|
|
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
|
|
*/
|
|
|
|
#ifndef CPU_CONF_H
|
|
#define CPU_CONF_H
|
|
|
|
#include "cpu_conf_common.h"
|
|
|
|
#include "vendor/stm32f7xx.h"
|
|
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
|
|
/**
|
|
* @brief ARM Cortex-M specific CPU configuration
|
|
* @{
|
|
*/
|
|
#define CPU_DEFAULT_IRQ_PRIO (1U)
|
|
#if defined(CPU_LINE_STM32F746xx)
|
|
#define CPU_IRQ_NUMOF (98U)
|
|
#elif defined(CPU_LINE_STM32F767xx) || defined(CPU_LINE_STM32F769xx)
|
|
#define CPU_IRQ_NUMOF (110U)
|
|
#elif defined(CPU_LINE_STM32F722xx)
|
|
#define CPU_IRQ_NUMOF (104U)
|
|
#endif
|
|
#define CPU_FLASH_BASE FLASH_BASE
|
|
/** @} */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* CPU_CONF_H */
|
|
/** @} */
|