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125 lines
3.9 KiB
C
125 lines
3.9 KiB
C
/*
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* Copyright (C) 2018 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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* @brief Shared CPU specific configuration for STM32 family
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef CPU_CONF_STM32_COMMON_H
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#define CPU_CONF_STM32_COMMON_H
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#include "periph_cpu.h"
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#include "periph/i2c.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
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defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \
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defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32L4) || \
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defined(CPU_FAM_STM32WB) || defined(CPU_FAM_STM32G4) || \
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defined(CPU_FAM_STM32G0) || defined(CPU_FAM_STM32L5) || \
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defined(CPU_FAM_STM32WL)
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/**
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* @brief Timing register settings
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*
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* @ref i2c_timing_param_t
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*/
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static const i2c_timing_param_t timing_params[] = {
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#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F7) || \
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defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB) || \
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defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32G0) || \
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defined(CPU_FAM_STM32L5) || defined(CPI_FAM_STM32WL)
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[ I2C_SPEED_NORMAL ] = {
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.presc = 0xB,
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.scll = 0x13, /* t_SCLL = 5.0us */
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.sclh = 0xF, /* t_SCLH = 4.0us */
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.sdadel = 0x2, /* t_SDADEL = 500ns */
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.scldel = 0x4, /* t_SCLDEL = 1250ns */
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},
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[ I2C_SPEED_FAST ] = {
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.presc = 5,
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.scll = 0x9, /* t_SCLL = 1250ns */
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.sclh = 0x3, /* t_SCLH = 500ns */
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.sdadel = 0x3, /* t_SDADEL = 375ns */
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.scldel = 0x3, /* t_SCLDEL = 500ns */
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},
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[ I2C_SPEED_FAST_PLUS ] = {
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.presc = 5,
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.scll = 0x3, /* t_SCLL = 500ns */
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.sclh = 0x1, /* t_SCLH = 250ns */
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.sdadel = 0x0, /* t_SDADEL = 0ns */
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.scldel = 0x1, /* t_SCLDEL = 250ns */
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}
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#elif defined(CPU_FAM_STM32F3)
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[ I2C_SPEED_NORMAL ] = {
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.presc = 1,
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.scll = 0x13, /* t_SCLL = 5.0us */
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.sclh = 0xF, /* t_SCLH = 4.0us */
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.sdadel = 0x2, /* t_SDADEL = 500ns */
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.scldel = 0x4, /* t_SCLDEL = 1250ns */
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},
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[ I2C_SPEED_FAST ] = {
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.presc = 0,
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.scll = 0x9, /* t_SCLL = 1250ns */
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.sclh = 0x3, /* t_SCLH = 500ns */
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.sdadel = 0x1, /* t_SDADEL = 125ns */
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.scldel = 0x3, /* t_SCLDEL = 500ns */
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},
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[ I2C_SPEED_FAST_PLUS ] = {
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.presc = 0,
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.scll = 0x6, /* t_SCLL = 875ns */
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.sclh = 0x3, /* t_SCLH = 500ns */
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.sdadel = 0x0, /* t_SDADEL = 0ns */
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.scldel = 0x1, /* t_SCLDEL = 250ns */
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}
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#elif defined(CPU_FAM_STM32L0)
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[ I2C_SPEED_NORMAL ] = {
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.presc = 1,
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.scll = 0x56, /* t_SCLL = 5.0us */
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.sclh = 0x3E, /* t_SCLH = 4.0us */
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.sdadel = 0x1, /* t_SDADEL = 500ns */
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.scldel = 0xA, /* t_SCLDEL = 1250ns */
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},
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[ I2C_SPEED_FAST ] = {
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.presc = 0,
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.scll = 0x2E, /* t_SCLL = 1250ns */
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.sclh = 0x11, /* t_SCLH = 500ns */
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.sdadel = 0x1, /* t_SDADEL = 125ns */
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.scldel = 0xB, /* t_SCLDEL = 500ns */
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},
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[ I2C_SPEED_FAST_PLUS ] = {
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.presc = 0,
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.scll = 0x6, /* t_SCLL = 875ns */
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.sclh = 0x3, /* t_SCLH = 500ns */
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.sdadel = 0x0, /* t_SDADEL = 0ns */
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.scldel = 0x1, /* t_SCLDEL = 250ns */
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}
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#endif
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};
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#endif /* CPU_FAM_STM32F0 || CPU_FAM_STM32F3 || CPU_FAM_STM32F7 ||
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CPU_FAM_STM32L0 || CPU_FAM_STM32L4 || CPU_FAM_STM32WB ||
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CPU_FAM_STM32G4 || CPU_FAM_STM32G0 || CPU_FAM_STM32L5 */
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#ifdef __cplusplus
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}
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#endif
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#endif /* CPU_CONF_STM32_COMMON_H */
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/** @} */
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