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dfdd076125
This patch implements the basic support the last of the FLEXCOMM modes, Serial Peripheral Interface, in a simple blocking mode with busy wait, which is enough to test all the SPI functionality end-to-end. Tested reading and writing registers on a SPI peripheral, and checked with the oscilloscope that the frequencies were as expected. Results from `tests/periph_spi`: ``` > init 0 0 2 -1 0 SPI_DEV(0) initialized: mode: 0, clk: 2, cs_port: -1, cs_pin: 0 > bench 1 - write 1000 times 1 byte: 16002 16009 2 - write 1000 times 2 byte: 18001 18008 3 - write 1000 times 100 byte: 802000 802007 4 - write 1000 times 1 byte to register: 24003 24010 5 - write 1000 times 2 byte to register: 26001 26008 6 - write 1000 times 100 byte to register: 810001 810008 7 - read 1000 times 2 byte: 23003 23009 8 - read 1000 times 100 byte: 807002 807009 9 - read 1000 times 2 byte from register: 32002 32009 10 - read 1000 times 100 byte from register: 816002 816009 11 - transfer 1000 times 2 byte: 23003 23009 12 - transfer 1000 times 100 byte: 807003 807010 13 - transfer 1000 times 2 byte to register: 32003 32009 14 - transfer 1000 times 100 byte to register:816002 816009 15 - acquire/release 1000 times: 7222 7228 -- - SUM: 5059250 5059351 ``` |
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.. | ||
vendor | ||
cpu_conf.h | ||
flexcomm.h | ||
gpio_mux.h | ||
periph_cpu.h | ||
vectors_qn908x.h |