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https://github.com/RIOT-OS/RIOT.git
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c74ec1c253
cpu/mips32r2_common adds base architecture support for mips32r2 cores it can be built in it own right as a 'CPU', but is dependant on a bootloader (like u-boot) to have bootstrapped the system, this has been tested on a 'malta' FPGA system (BOARD=mips-malta) with various mips32r2 compliant cores (interAptiv, P5600, etc).
152 lines
3.8 KiB
ArmAsm
152 lines
3.8 KiB
ArmAsm
/*
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* Copyright 2016, Imagination Technologies Limited and/or its
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* affiliated group companies.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* ************ PLEASE READ ME !!!! ****************
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This file is missing from $MIPS_ELF_ROOT/share/mips/hal
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Future toolchain versions will have this file included and this local copy will
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be no longer needed.
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Note the above copyright/license is 3 Clause BSD and as such is compatible with LGPLv2.1
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as such we grant licensing this file under LGPLv2.1 (See the file LICENSE in the top level
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directory for more details) as well.
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Thanks for reading.
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*/
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.set nomips16
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#include <mips/asm.h>
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#include <mips/regdef.h>
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#include <mips/m32c0.h>
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#include <mips/hal.h>
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#include <mips/endian.h>
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#
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# FUNCTION: _dsp_save
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#
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# DESCRIPTION: save the DSP context.
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#
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# RETURNS: int
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#
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# 0: No context saved
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# CTX_*: Type of conext stored
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#
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LEAF(_dsp_save)
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PTR_S zero, LINKCTX_NEXT(a0)
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move v0, zero
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# Test for DSP support
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mfc0 t0, C0_CONFIG3
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ext t0, t0, CFG3_DSPP_SHIFT, 1
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beqz t0, 1f
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# Test for DSP enabled
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mfc0 t0, C0_STATUS
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ext t0, t0, SR_MX_SHIFT, 1
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beqz t0, 1f
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lui v0, %hi(LINKCTX_TYPE_DSP)
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addiu v0, v0, %lo(LINKCTX_TYPE_DSP)
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.set push
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.set dsp
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rddsp t1
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mfhi t2, $ac1
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mflo t3, $ac1
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mfhi t4, $ac2
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mflo t5, $ac2
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mfhi t6, $ac3
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mflo t7, $ac3
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.set pop
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sw t1, DSPCTX_DSPC(a0)
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sw t2, DSPCTX_HI1(a0)
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sw t3, DSPCTX_LO1(a0)
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sw t4, DSPCTX_HI2(a0)
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sw t5, DSPCTX_LO2(a0)
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sw t6, DSPCTX_HI3(a0)
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sw t7, DSPCTX_LO3(a0)
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REG_S v0, LINKCTX_ID(a0)
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1:
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jr ra
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END(_dsp_save)
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#
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# FUNCTION: _dsp_load
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#
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# DESCRIPTION: load the DSP context.
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#
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# RETURNS: int
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#
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# 0: Unrecognised context
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# CTX_*: Type of context restored
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#
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LEAF(_dsp_load)
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REG_L v0, LINKCTX_ID(a0)
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lui v1, %hi(LINKCTX_TYPE_DSP)
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addiu v1, v1, %lo(LINKCTX_TYPE_DSP)
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bne v0,v1,1f
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# Test for DSP support
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mfc0 t0, C0_CONFIG3
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ext t0, t0, CFG3_DSPP_SHIFT, 1
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beqz t0, 1f
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# Force on DSP
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di t3
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ehb
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or t3, t3, SR_MX
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mtc0 t3, C0_STATUS
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ehb
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lw t1, DSPCTX_DSPC(a0)
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lw t2, DSPCTX_HI1(a0)
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lw t3, DSPCTX_LO1(a0)
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lw t4, DSPCTX_HI2(a0)
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lw t5, DSPCTX_LO2(a0)
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lw t6, DSPCTX_HI3(a0)
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lw t7, DSPCTX_LO3(a0)
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.set push
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.set dsp
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wrdsp t1
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mthi t2, $ac1
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mtlo t3, $ac1
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mthi t4, $ac2
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mtlo t5, $ac2
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mthi t6, $ac3
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mtlo t7, $ac3
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.set pop
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jr ra
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1:
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# Don't recognise this context, fail
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move v0, zero
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jr ra
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END(_dsp_load)
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