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36e8526046
The API was based on the assumption that GPIO ports are mapped in memory
sanely, so that a `GPIO_PORT(num)` macro would work allow for constant
folding when `num` is known and still be efficient when it is not.
Some MCUs, however, will need a look up tables to efficiently translate
GPIO port numbers to the port's base address. This will prevent the use
of such a `GPIO_PORT(num)` macro in constant initializers.
As a result, we rather provide `GPIO_PORT_0`, `GPIO_PORT_1`, etc. macros
for each GPIO port present (regardless of MCU naming scheme), as well as
`GPIO_PORT_A`, `GPIO_PORT_B`, etc. macros if (and only if) the MCU port
naming scheme uses letters rather than numbers.
These can be defined as macros to the peripheral base address even when
those are randomly mapped into the address space. In addition, a C
function `gpio_port()` replaces the role of the `GPIO_PORT()` and
`gpio_port_num()` the `GPIO_PORT_NUM()` macro. Those functions will
still be implemented as efficient as possible and will allow constant
folding where it was formerly possible. Hence, there is no downside for
MCUs with sane peripheral memory mapping, but it is highly beneficial
for the crazy ones.
There are also two benefits for the non-crazy MCUs:
1. We can now test for valid port numbers with `#ifdef GPIO_PORT_<NUM>`
- This directly benefits the test in `tests/periph/gpio_ll`, which
can now provide a valid GPIO port for each and every board
- Writing to invalid memory mapped I/O addresses was treated as
triggering undefined behavior by the compiler and used as a
optimization opportunity
2. We can now detect at compile time if the naming scheme of the MCU
uses letters or numbers, and produce more user friendly output.
- This is directly applied in the test app
46 lines
1.4 KiB
Makefile
46 lines
1.4 KiB
Makefile
BOARD ?= nucleo-f767zi
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# Custom per-board pin configuration (e.g. for setting PORT_IN, PIN_IN_0, ...)
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# can be provided in a Makefile.$(BOARD) file:
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-include Makefile.$(BOARD)
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# Choose two output pins that do not conflict with stdio and are not connected
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# to external devices such as sensors, network devices, etc.
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#
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# Beware: If other pins on the output port are configured as output GPIOs, they
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# might be written to during this test.
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#PORT_OUT := 0
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PIN_OUT_0 ?= 0
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PIN_OUT_1 ?= 1
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include ../Makefile.bench_common
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FEATURES_REQUIRED += periph_gpio_ll
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FEATURES_REQUIRED += periph_gpio
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FEATURES_OPTIONAL += periph_gpio_ll_irq
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FEATURES_OPTIONAL += periph_gpio_ll_irq_level_triggered_high
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FEATURES_OPTIONAL += periph_gpio_ll_irq_level_triggered_low
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USEMODULE += ztimer_usec
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include $(RIOTBASE)/Makefile.include
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# Configure if compensation of loop overhead in the estimation of the
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# toggling speed should be performed. Default: Do so, except for Cortex-M7.
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# For the Cortex-M7 the loop instructions are emitted together with the GPIO
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# writes due to the dual issue feature. Hence, there is no loop overhead for
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# Cortex-M7 to compensate for.
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ifeq (cortex-m7,$(CPU_CORE))
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COMPENSATE_OVERHEAD ?= 0
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endif
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COMPENSATE_OVERHEAD ?= 1
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ifneq (,$(PORT_OUT))
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CFLAGS += -DPORT_OUT=GPIO_PORT_$(PORT_OUT)
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CFLAGS += -DPORT_OUT_NUM=$(PORT_OUT)
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endif
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CFLAGS += -DPIN_OUT_0=$(PIN_OUT_0)
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CFLAGS += -DPIN_OUT_1=$(PIN_OUT_1)
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CFLAGS += -DCOMPENSATE_OVERHEAD=$(COMPENSATE_OVERHEAD)
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