mirror of
https://github.com/RIOT-OS/RIOT.git
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338 lines
8.3 KiB
C
338 lines
8.3 KiB
C
/*
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* Copyright (C) 2019 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp8266
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* @{
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*
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* @file
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* @brief CPU specific definitions and functions for peripheral handling
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include <stdint.h>
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#include <limits.h>
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#include "eagle_soc.h"
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#include "cpu_conf.h"
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#include "macros/units.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Length of the CPU_ID in octets
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*/
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#define CPUID_LEN (4U)
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/**
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* @brief CPU cycles per busy wait loop
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*/
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#define CPU_CYCLES_PER_LOOP (5)
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/**
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* @name GPIO configuration
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* @{
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*/
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/**
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* @brief Override the default gpio_t type definition
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*
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* This is required here to have gpio_t defined in this file.
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* @{
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*/
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#define HAVE_GPIO_T
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typedef unsigned int gpio_t;
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/** @} */
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/**
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* @brief Definition of a fitting UNDEF value
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*/
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#define GPIO_UNDEF ((gpio_t)(UINT_MAX))
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/**
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* @brief Define a CPU specific GPIO pin generator macro
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*/
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#define GPIO_PIN(x, y) ((x & 0) | y)
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/**
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* @brief Available GPIO ports on ESP8266
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*/
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#define PORT_GPIO (0)
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/**
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* @brief Define CPU specific number of GPIO pins
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*/
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#define GPIO_PIN_NUMOF (17)
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#ifndef DOXYGEN
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/**
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* @brief Override flank selection values
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* @{
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*/
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#define HAVE_GPIO_FLANK_T
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typedef enum {
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GPIO_NONE = 0,
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GPIO_RISING = 1, /**< emit interrupt on rising flank */
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GPIO_FALLING = 2, /**< emit interrupt on falling flank */
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GPIO_BOTH = 3, /**< emit interrupt on both flanks */
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GPIO_LOW = 4, /**< emit interrupt on low level */
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GPIO_HIGH = 5 /**< emit interrupt on low level */
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} gpio_flank_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @name Predefined GPIO names
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* @{
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*/
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#define GPIO0 (GPIO_PIN(PORT_GPIO, 0))
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#define GPIO1 (GPIO_PIN(PORT_GPIO, 1))
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#define GPIO2 (GPIO_PIN(PORT_GPIO, 2))
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#define GPIO3 (GPIO_PIN(PORT_GPIO, 3))
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#define GPIO4 (GPIO_PIN(PORT_GPIO, 4))
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#define GPIO5 (GPIO_PIN(PORT_GPIO, 5))
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#define GPIO6 (GPIO_PIN(PORT_GPIO, 6))
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#define GPIO7 (GPIO_PIN(PORT_GPIO, 7))
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#define GPIO8 (GPIO_PIN(PORT_GPIO, 8))
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#define GPIO9 (GPIO_PIN(PORT_GPIO, 9))
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#define GPIO10 (GPIO_PIN(PORT_GPIO, 10))
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#define GPIO11 (GPIO_PIN(PORT_GPIO, 11))
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#define GPIO12 (GPIO_PIN(PORT_GPIO, 12))
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#define GPIO13 (GPIO_PIN(PORT_GPIO, 13))
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#define GPIO14 (GPIO_PIN(PORT_GPIO, 14))
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#define GPIO15 (GPIO_PIN(PORT_GPIO, 15))
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#define GPIO16 (GPIO_PIN(PORT_GPIO, 16))
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/** @} */
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/** @} */
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/**
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* @name I2C configuration
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*
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* ESP8266 provides up to two bit-banging I2C interfaces.
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*
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* The board-specific configuration of the I2C interface I2C_DEV(n) requires
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* the definition of
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*
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* I2Cn_SPEED, the bus speed,
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* I2Cn_SCL, the GPIO used as SCL signal, and
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* I2Cn_SDA, the GPIO used as SDA signal,
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*
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* where n can be 0 or 1. If they are not defined, the I2C interface
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* I2C_DEV(n) is not used.
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*
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* @note The configuration of the I2C interfaces I2C_DEV(n) must be in
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* continuous ascending order of n.
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*
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* I2C_NUMOF is determined automatically from board-specific peripheral
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* definitions of I2Cn_SPEED, I2Cn_SCK, and I2Cn_SDA.
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*
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* @{
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*/
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#ifndef DOXYGEN
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/**
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* @brief Override I2C clock speed values
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*
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* This is required here to have i2c_speed_t defined in this file.
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* @{
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*/
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#define HAVE_I2C_SPEED_T
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typedef enum {
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I2C_SPEED_LOW = 0, /**< 10 kbit/s */
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I2C_SPEED_NORMAL, /**< 100 kbit/s */
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I2C_SPEED_FAST, /**< 400 kbit/s */
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I2C_SPEED_FAST_PLUS, /**< 1 Mbit/s */
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I2C_SPEED_HIGH, /**< not supported */
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} i2c_speed_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @brief I2C configuration structure type
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*/
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typedef struct {
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i2c_speed_t speed; /**< I2C bus speed */
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gpio_t scl; /**< GPIO used as SCL pin */
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gpio_t sda; /**< GPIO used as SDA pin */
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} i2c_conf_t;
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/**
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* @brief Maximum number of I2C interfaces that can be used by board definitions
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*/
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#define I2C_NUMOF_MAX (2)
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#define PERIPH_I2C_NEED_READ_REG /**< i2c_read_reg required */
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#define PERIPH_I2C_NEED_READ_REGS /**< i2c_read_regs required */
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#define PERIPH_I2C_NEED_WRITE_REG /**< i2c_write_reg required */
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#define PERIPH_I2C_NEED_WRITE_REGS /**< i2c_write_regs required */
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/** @} */
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/**
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* @name Power management configuration
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* @{
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*/
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#define PROVIDES_PM_SET_LOWEST
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#define PROVIDES_PM_RESTART
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#define PROVIDES_PM_OFF
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/** @} */
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/**
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* @name PWM configuration
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*
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* The hardware implementation of ESP8266 PWM supports only frequencies as
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* power of two. Therefore a software implementation of one PWM device
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* PWM_DEV(0) with up to 8 PWM channels (#PWM_CHANNEL_NUM_MAX) is used. The
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* GPIOs that can be used as PWM channels are defined by #PWM0_GPIOS in board
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* definition.
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*
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* @note The minimum PWM period that can be realized is 10 us or 100.000 PWM
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* clock cycles per second. Therefore, the product of frequency and resolution
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* should not be greater than 100.000. Otherwise the frequency is scaled down
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* automatically.
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*
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* @{
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*/
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/**
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* @brief Maximum number of PWM devices.
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*/
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#define PWM_NUMOF_MAX (1)
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/**
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* @brief Maximum number of channels per PWM device.
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*/
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#define PWM_CHANNEL_NUM_MAX (8)
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/** @} */
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/**
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* @name RNG configuration
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* @{
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*/
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/**
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* @brief The address of the register for accessing the hardware RNG.
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*/
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#define RNG_DATA_REG_ADDR (0x3ff20e44)
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/** @} */
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/**
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* @name RTT and RTC configuration
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* @{
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*/
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#define RTT_FREQUENCY (312500UL)
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#define RTT_MAX_VALUE (0xFFFFFFFFUL)
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/** @} */
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/**
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* @name SPI configuration
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*
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* ESP8266 has two SPI controllers:
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*
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* - _CSPI_ for caching and accessing the flash memory<br>
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* - _HSPI_ for peripherals
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*
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* Thus, _HSPI_ is the only SPI interface that is available for peripherals.
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* It is exposed as RIOT's SPI_DEV(0). The pin configuration of the _HSPI_
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* interface is fixed as shown in following table.
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*
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* Signal | Pin
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* -- --------|-------
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* #SPI0_MISO | GPIO12
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* #SPI0_MOSI | GPIO13
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* #SPI0_SCK | GPIO14
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* #SPI0_CS0 | GPIOn with n = 0, 2, 4, 5, 15, 16 (additionally 9, 10 in DOUT flash mode)
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*
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* The only pin definition that can be overridden by an application-specific
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* board configuration is the CS signal defined by #SPI0_CS0.
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*
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* @{
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*/
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/**
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* @brief SPI controllers that can be used for peripheral interfaces
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*/
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typedef enum {
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HSPI = 1, /**< HSPI interface controller */
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} spi_ctrl_t;
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/**
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* @brief Override SPI clock speed values
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* @{
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*/
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#define HAVE_SPI_CLK_T
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typedef enum {
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SPI_CLK_100KHZ = KHZ(100), /**< drive the SPI bus with 100KHz */
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SPI_CLK_400KHZ = KHZ(400), /**< drive the SPI bus with 400KHz */
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SPI_CLK_1MHZ = MHZ(1), /**< drive the SPI bus with 1MHz */
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SPI_CLK_5MHZ = MHZ(5), /**< drive the SPI bus with 5MHz */
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SPI_CLK_10MHZ = MHZ(10), /**< drive the SPI bus with 10MHz */
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} spi_clk_t;
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/**
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* @brief SPI configuration structure type
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*/
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typedef struct {
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spi_ctrl_t ctrl; /**< SPI controller used for the interface */
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gpio_t sck; /**< GPIO used as SCK pin */
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gpio_t mosi; /**< GPIO used as MOSI pin */
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gpio_t miso; /**< GPIO used as MISO pin */
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gpio_t cs; /**< GPIO used as CS0 pin */
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} spi_conf_t;
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/**
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* @brief Maximum number of SPI interfaces
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*/
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#define SPI_NUMOF_MAX (1)
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTE /**< requires function spi_transfer_byte */
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#define PERIPH_SPI_NEEDS_TRANSFER_REG /**< requires function spi_transfer_reg */
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS /**< requires function spi_transfer_regs */
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/** @} */
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/** @} */
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/**
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* @brief Prevent shared timer functions from being used
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*/
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#define PERIPH_TIMER_PROVIDES_SET
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/**
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* @name UART configuration
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*
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* All ESP8266 boards have exactly one UART device with fixed pin mapping.
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*
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* @{
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*/
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/**
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* @brief UART configuration structure type
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*/
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typedef struct {
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gpio_t txd; /**< GPIO used as TxD pin */
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gpio_t rxd; /**< GPIO used as RxD pin */
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} uart_conf_t;
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/**
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* @brief Maximum number of UART interfaces
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*/
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#define UART_NUMOF_MAX (2)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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