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141 lines
4.0 KiB
C
141 lines
4.0 KiB
C
/*
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* Copyright (C) 2014-2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_efm32
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* @ingroup drivers_periph_spi
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* @{
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*
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* @file
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* @brief Low-level SPI driver implementation
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*
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* @author Ryan Kurte <ryankurte@gmail.com>
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* @author Bas Stottelaar <basstottelaar@gmail.com>
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* @author Christian Amsüss <c@amsuess.com>
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* @}
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*/
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#include <assert.h>
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#include "cpu.h"
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#include "sched.h"
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#include "thread.h"
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#include "mutex.h"
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#include "periph_conf.h"
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#include "periph/gpio.h"
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#include "periph/spi.h"
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#include "em_device.h"
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#include "em_cmu.h"
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#include "em_usart.h"
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static mutex_t spi_lock[SPI_NUMOF];
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void spi_init(spi_t bus)
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{
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assert(bus < SPI_NUMOF);
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/* initialize lock */
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mutex_init(&spi_lock[bus]);
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/* initialize pins */
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spi_init_pins(bus);
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}
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void spi_init_pins(spi_t bus)
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{
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/* configure the pins */
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gpio_init(spi_config[bus].clk_pin, GPIO_OUT);
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gpio_init(spi_config[bus].mosi_pin, GPIO_OUT);
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gpio_init(spi_config[bus].miso_pin, GPIO_IN_PD);
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}
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#define GET_PIN(x) (x & 0xf)
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#define GET_PORT(x) (x >> 4)
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#define USART_NUM(ref) ((ref == USART0) ? 0 : -1)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void)cs;
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assert((unsigned)bus < SPI_NUMOF);
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mutex_lock(&spi_lock[bus]);
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/* power on spi bus */
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#if defined(_SILICON_LABS_32B_SERIES_0) || defined(_SILICON_LABS_32B_SERIES_1)
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CMU_ClockEnable(cmuClock_HFPER, true);
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#endif
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CMU_ClockEnable(spi_config[bus].cmu, true);
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USART_InitSync_TypeDef init = USART_INITSYNC_DEFAULT;
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init.baudrate = (uint32_t)clk;
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init.clockMode = (USART_ClockMode_TypeDef)mode;
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init.msbf = true;
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USART_InitSync(spi_config[bus].dev, &init);
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/* configure pin functions */
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#if defined(_SILICON_LABS_32B_SERIES_0)
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spi_config[bus].dev->ROUTE = (spi_config[bus].loc |
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USART_ROUTE_RXPEN |
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USART_ROUTE_TXPEN |
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USART_ROUTE_CLKPEN);
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#elif defined(_SILICON_LABS_32B_SERIES_1)
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spi_config[bus].dev->ROUTELOC0 = spi_config[bus].loc;
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spi_config[bus].dev->ROUTEPEN = (USART_ROUTEPEN_RXPEN |
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USART_ROUTEPEN_TXPEN |
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USART_ROUTEPEN_CLKPEN);
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#elif defined(_SILICON_LABS_32B_SERIES_2)
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GPIO->USARTROUTE[USART_NUM(spi_config[bus].dev)].TXROUTE =
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(GET_PORT(spi_config[bus].mosi_pin) << _GPIO_USART_TXROUTE_PORT_SHIFT) |
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(GET_PIN(spi_config[bus].mosi_pin) << _GPIO_USART_TXROUTE_PIN_SHIFT);
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GPIO->USARTROUTE[USART_NUM(spi_config[bus].dev)].RXROUTE =
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(GET_PORT(spi_config[bus].miso_pin) << _GPIO_USART_RXROUTE_PORT_SHIFT) |
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(GET_PIN(spi_config[bus].miso_pin) << _GPIO_USART_RXROUTE_PIN_SHIFT);
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GPIO->USARTROUTE[USART_NUM(spi_config[bus].dev)].CLKROUTE =
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(GET_PORT(spi_config[bus].clk_pin) << _GPIO_USART_CLKROUTE_PORT_SHIFT) |
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(GET_PIN(spi_config[bus].clk_pin) << _GPIO_USART_CLKROUTE_PIN_SHIFT);
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GPIO->USARTROUTE[USART_NUM(spi_config[bus].dev)].ROUTEEN =
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(GPIO_USART_ROUTEEN_RXPEN | GPIO_USART_ROUTEEN_TXPEN | GPIO_USART_ROUTEEN_CLKPEN);
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#endif
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}
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void spi_release(spi_t bus)
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{
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/* power off spi bus */
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CMU_ClockEnable(spi_config[bus].cmu, false);
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mutex_unlock(&spi_lock[bus]);
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}
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void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
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const void *out, void *in, size_t len)
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{
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uint8_t *out_buf = (uint8_t *)out;
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uint8_t *in_buf = (uint8_t *)in;
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if (cs != SPI_CS_UNDEF) {
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gpio_clear((gpio_t)cs);
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}
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for (size_t i = 0; i < len; i++) {
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uint8_t ret = USART_SpiTransfer(spi_config[bus].dev,
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out != NULL ? out_buf[i] : 0);
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if (in != NULL) {
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in_buf[i] = ret;
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}
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}
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if ((!cont) && (cs != SPI_CS_UNDEF)) {
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gpio_set((gpio_t)cs);
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}
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}
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