mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
675dcc381c
- Move common code for USART (shared SPI / UART peripheral) to its
own file and allow sharing the USART peripheral to provide both
UART and SPI in round-robin fashion.
- Configure both UART and SPI bus via a `struct` in the board's
`periph_conf.h`
- this allows allocating the two UARTs as needed by the use case
- since both USARTs signals have a fixed connection to a single
GPIO, most configuration is moved to the CPU
- the board now only needs to decide which bus is provided by
which USART
Note: Sharing an USART used as UART requires cooperation from the app:
- If the UART is used in TX-only mode (no RX callback), the driver
will release the USART while not sending
- If the UART is used to also receive, the application needs to power
the UART down while not expecting something to send. An
`spi_acquire()` will be blocked while the UART is powered up.
82 lines
1.7 KiB
C
82 lines
1.7 KiB
C
/*
|
|
* Copyright (C) 2014 INRIA
|
|
* 2015 Freie Universität Berlin
|
|
*
|
|
* This file is subject to the terms and conditions of the GNU Lesser General
|
|
* Public License v2.1. See the file LICENSE in the top level directory for more
|
|
* details.
|
|
*/
|
|
|
|
/**
|
|
* @ingroup boards_telosb
|
|
* @{
|
|
*
|
|
* @file
|
|
* @brief TelosB peripheral configuration
|
|
*
|
|
* @author Oliver Hahm <oliver.hahm@inria.fr>
|
|
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
|
|
*/
|
|
|
|
#ifndef PERIPH_CONF_H
|
|
#define PERIPH_CONF_H
|
|
|
|
#include "macros/units.h"
|
|
#include "periph_cpu.h"
|
|
#include "cfg_timer_a_smclk_b_aclk.h"
|
|
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
|
|
#define CLOCK_CORECLOCK msp430_dco_freq
|
|
|
|
/**
|
|
* @brief Clock configuration
|
|
*/
|
|
static const msp430_clock_params_t clock_params = {
|
|
.target_dco_frequency = 2457600U,
|
|
.lfxt1_frequency = 32768,
|
|
.main_clock_source = MAIN_CLOCK_SOURCE_DCOCLK,
|
|
.submain_clock_source = SUBMAIN_CLOCK_SOURCE_DCOCLK,
|
|
.main_clock_divier = MAIN_CLOCK_DIVIDE_BY_1,
|
|
.submain_clock_divier = SUBMAIN_CLOCK_DIVIDE_BY_1,
|
|
.auxiliary_clock_divier = AUXILIARY_CLOCK_DIVIDE_BY_1,
|
|
};
|
|
|
|
/**
|
|
* @name UART configuration
|
|
* @{
|
|
*/
|
|
static const uart_conf_t uart_config[] = {
|
|
{
|
|
.uart = &usart1_as_uart,
|
|
},
|
|
};
|
|
|
|
#define UART0_RX_ISR (USART1RX_VECTOR) /**< RX IRQ vector of UART 0 */
|
|
#define UART0_TX_ISR (USART1TX_VECTOR) /**< TX IRQ vector of UART 0 */
|
|
|
|
#define UART_NUMOF ARRAY_SIZE(uart_config)
|
|
/** @} */
|
|
|
|
/**
|
|
* @name SPI configuration
|
|
* @{
|
|
*/
|
|
static const spi_conf_t spi_config[] = {
|
|
{
|
|
.spi = &usart0_as_spi,
|
|
},
|
|
};
|
|
|
|
#define SPI_NUMOF ARRAY_SIZE(spi_config)
|
|
/** @} */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* PERIPH_CONF_H */
|
|
/** @} */
|