mirror of
https://github.com/RIOT-OS/RIOT.git
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215 lines
5.8 KiB
C
215 lines
5.8 KiB
C
/*
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* Copyright (C) 2019 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_p-nucleo-wb55
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the p-nucleo-wb55 board
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*
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* @author Francisco Molina <francois-xavier.molina@inria.fr>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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/* Add specific clock configuration (HSE, LSE) for this board here */
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#ifndef CONFIG_BOARD_HAS_LSE
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#define CONFIG_BOARD_HAS_LSE 1
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#endif
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#ifndef CONFIG_BOARD_HAS_HSE
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#define CONFIG_BOARD_HAS_HSE 1
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#endif
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#ifndef CONFIG_CLOCK_HSE
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#define CONFIG_CLOCK_HSE MHZ(32)
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#endif
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/* EXTAHB (HCLK2) max freq 32 Mhz*/
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#define CLOCK_EXTAHB_DIV RCC_EXTCFGR_C2HPRE_3
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#define CLOCK_EXTAHB (CLOCK_CORECLOCK / 2)
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#include "periph_cpu.h"
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#include "clk_conf.h"
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#include "cfg_i2c1_pb8_pb9.h"
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#include "cfg_rtt_default.h"
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#include "cfg_timer_tim2.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART1,
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.rcc_mask = RCC_APB2ENR_USART1EN,
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.rx_pin = GPIO_PIN(PORT_B, 7),
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.tx_pin = GPIO_PIN(PORT_B, 6),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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.bus = APB2,
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.irqn = USART1_IRQn,
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.type = STM32_USART,
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.clk_src = 0, /* Use APB clock */
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},
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{
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.dev = LPUART1,
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.rcc_mask = RCC_APB1ENR2_LPUART1EN,
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.rx_pin = GPIO_PIN(PORT_A, 3),
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.tx_pin = GPIO_PIN(PORT_A, 2),
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.rx_af = GPIO_AF8,
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.tx_af = GPIO_AF8,
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.bus = APB12,
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.irqn = LPUART1_IRQn,
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.type = STM32_LPUART,
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.clk_src = 0, /* Use APB clock */
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},
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};
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#define UART_0_ISR (isr_usart1)
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#define UART_1_ISR (isr_lpuart1)
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = SPI1,
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.mosi_pin = GPIO_PIN(PORT_A, 7),
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.miso_pin = GPIO_PIN(PORT_A, 6),
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.sclk_pin = GPIO_PIN(PORT_A, 5),
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.cs_pin = SPI_CS_UNDEF,
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.mosi_af = GPIO_AF5,
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.miso_af = GPIO_AF5,
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.sclk_af = GPIO_AF5,
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.cs_af = GPIO_AF5,
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.rccmask = RCC_APB2ENR_SPI1EN,
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.apbbus = APB2,
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}
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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/**
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* @name PWM configuration
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*
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* To find appriopate device and channel find in the MCU datasheet table
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* concerning "Alternate function AF0 to AF7" a text similar to TIM[X]_CH[Y],
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* where:
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* TIM[X] - is device,
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* [Y] - describes used channel (indexed from 0), for example TIM2_CH1 is
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* channel 0 in configuration structure (cc_chan - field),
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* Port column in the table describes connected port.
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*
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* For Nucleo-WB55 this information is in the datasheet, Table 18, page 72.
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*
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* @{
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*/
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static const pwm_conf_t pwm_config[] = {
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{
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.dev = TIM1,
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.rcc_mask = RCC_APB2ENR_TIM1EN,
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.chan = { { .pin = GPIO_PIN(PORT_A, 8) /* CN9 D6 */, .cc_chan = 0},
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{ .pin = GPIO_PIN(PORT_A, 9) /* CN5 D9 */, .cc_chan = 1},
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{ .pin = GPIO_PIN(PORT_A, 10) /* CN9 D3 */, .cc_chan = 2},
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{ .pin = GPIO_PIN(PORT_A, 11) /* CC10 14 */, .cc_chan = 3} },
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.af = GPIO_AF1,
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.bus = APB2
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},
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};
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#define PWM_NUMOF ARRAY_SIZE(pwm_config)
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/** @} */
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/**
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* @brief USB device FS configuration
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*/
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static const stm32_usbdev_fs_config_t stm32_usbdev_fs_config[] = {
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{
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.base_addr = (uintptr_t)USB,
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.rcc_mask = RCC_APB1ENR1_USBEN | RCC_APB1ENR1_CRSEN,
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.irqn = USB_LP_IRQn,
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.apb = APB1,
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.dm = GPIO_PIN(PORT_A, 11),
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.dp = GPIO_PIN(PORT_A, 12),
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.af = GPIO_AF10,
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.disconn = GPIO_UNDEF,
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},
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};
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/**
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* @brief Interrupt function name mapping
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*/
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#define USBDEV_ISR isr_usb_lp
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/**
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* @brief Number of available USB device FS peripherals
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*/
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#define USBDEV_NUMOF ARRAY_SIZE(stm32_usbdev_fs_config)
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/**
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* @brief ADC configuration
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*
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* Note that we do not configure all ADC channels,
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* and not in the STM32WB55RG order. Instead, we
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* just define 6 ADC channels, for the Nucleo
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* Arduino header pins A0-A5 and the internal VBAT channel.
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*
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* To find appropriate device and channel find in the
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* board manual, table showing pin assignments and
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* information about ADC - a text similar to ADC[X]_IN[Y],
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* where:
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* [X] - describes used device - indexed from 0,
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* for example ADC1_IN10 is device 0,
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* [Y] - describes used channel - indexed from 1,
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* for example ADC1_IN10 is channel 10
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*
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* For P-NUCLEO-WB55 this information is in board manual,
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* Table 10, page 39.
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*
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* VBAT is connected ADC1_IN18 or ADC3_IN18 and a voltage divider
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* is used, so that only 1/3 of the actual VBAT is measured. This
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* allows for a supply voltage higher than the reference voltage.
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*
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* For P-NUCLEO-WB55 more information is provided in the Reference Manual,
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* in section 16.4.31 - Vbat supply monitoring, page 475.
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* @{
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*/
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static const adc_conf_t adc_config[] = {
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{GPIO_PIN(PORT_C, 0), 0, 1}, /*< ADC1_IN1 */
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{GPIO_PIN(PORT_C, 1), 0, 2}, /*< ADC1_IN2 */
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{GPIO_PIN(PORT_A, 1), 0, 6}, /*< ADC1_IN6 */
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{GPIO_PIN(PORT_A, 0), 0, 5}, /*< ADC1_IN5 */
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{GPIO_PIN(PORT_C, 3), 0, 4}, /*< ADC1_IN4 */
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{GPIO_PIN(PORT_C, 2), 0, 3}, /*< ADC1_IN3 */
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{GPIO_UNDEF, 0, 18}, /* VBAT */
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};
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#define VBAT_ADC ADC_LINE(6) /**< VBAT ADC line */
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#define ADC_NUMOF ARRAY_SIZE(adc_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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