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26 lines
1.2 KiB
Makefile
26 lines
1.2 KiB
Makefile
# UART @ 115200 Bd is not reliable with a CPU clock of ~ 5 MHz, occasionally
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# chars get lost. Adding an 8 MHz crystal or an external resistor so that the
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# DCO can reach 8 MHz does yield the speed bump needed for a more reliable
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# UART connection @ 115200 Bd
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BAUD ?= 9600
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# When freshly plugged in the Olimex MSP430-JTAG-Tiny debugger provides a
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# ttyACM interface, which is only available until the first flashing. A
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# `make term` or even a `make flash term` may pick the JTAG debugger instead
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# of the correct USB TTL adapter when the JTAG programmer is plugged in after
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# the TTL adapter and `MOST_RECENT_PORT=1` is used.
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#
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# To fix that, we filter first by the most common USB TTL adapter drivers and
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# fall back to all TTY when no such TTL adapter is found.
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TTY_BOARD_FILTER := --driver 'cp210x|ch341|ftdi_sio'
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TTY_SELECT_CMD := $(RIOTTOOLS)/usb-serial/ttys.py \
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--most-recent \
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--format path serial \
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$(TTY_BOARD_FILTER) || \
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$(RIOTTOOLS)/usb-serial/ttys.py \
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--most-recent \
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--format path serial
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include $(RIOTBOARD)/common/msp430/Makefile.include
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CFLAGS += -DSTDIO_UART_BAUDRATE=$(BAUD)
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