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RIOT/boards/common/gd32v/dist/openocd.cfg
2023-03-19 18:28:20 +01:00

31 lines
777 B
INI

adapter speed 10000
adapter srst pulse_width 10
reset_config srst_nogate srst_only srst_open_drain
source [find target/gd32vf103.cfg]
$_TARGETNAME configure -event reset-assert {
global _TARGETNAME
# Halt the core.
halt
# Unlock 0xe0042008 so that the next write triggers a reset
$_TARGETNAME mww 0xe004200c 0x4b5a6978
# We need to trigger the reset using abstract memory access, since
# progbuf access tries to read a status code out of a core register
# after the write happens, which fails when the core is in reset.
riscv set_mem_access abstract
# Reset the Hart
$_TARGETNAME mww 0xe0042008 0x1
# Put the memory access mode back to what it was.
riscv set_mem_access progbuf
# Continue execution
resume
}