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https://github.com/RIOT-OS/RIOT.git
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f7a77ebb04
The driver uses the netdev interface. Due to the limited capabilities of the transceiver (32 byte FIFO and no source address in the layer2 frame), it relies on 6LowPAN compression and adds the source address to the frame for that.
121 lines
4.0 KiB
C
121 lines
4.0 KiB
C
/*
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* Copyright (C) 2019 Otto-von-Guericke-Universität Magdeburg
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup drivers_nrf24l01p_ng
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* @{
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*
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* @file
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* @brief Implementation of state transition procedures
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* for the NRF24L01+ (NG) transceiver
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*
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* @author Fabian Hüßler <fabian.huessler@ovgu.de>
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* @}
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*/
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#include <assert.h>
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#include <string.h>
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#include "xtimer.h"
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#include "net/netopt.h"
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#include "nrf24l01p_ng_registers.h"
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#include "nrf24l01p_ng_communication.h"
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#include "nrf24l01p_ng_states.h"
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static void _restore_address_p0(const nrf24l01p_ng_t *dev)
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{
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uint8_t addr_buffer[NRF24L01P_NG_ADDR_WIDTH];
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memcpy(addr_buffer, NRF24L01P_NG_ADDR_P0(dev), NRF24L01P_NG_ADDR_WIDTH);
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nrf24l01p_ng_write_reg(dev, NRF24L01P_NG_REG_RX_ADDR_P0, addr_buffer,
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NRF24L01P_NG_ADDR_WIDTH);
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nrf24l01p_ng_reg8_write(dev, NRF24L01P_NG_REG_SETUP_AW,
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NRF24L01P_NG_FLG_AW(nrf24l01p_ng_valtoe_aw(NRF24L01P_NG_ADDR_WIDTH)));
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}
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void nrf24l01p_ng_transition_to_power_down(nrf24l01p_ng_t *dev)
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{
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DEBUG_PUTS("[nrf24l01p_ng] transition to POWER_DOWN");
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assert(dev->state & NRF24L01P_NG_TRANSITION_TO_POWER_DOWN);
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uint8_t config = NRF24L01P_NG_FLG_PWR_UP;
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nrf24l01p_ng_reg8_clear(dev, NRF24L01P_NG_REG_CONFIG, &config);
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dev->state = NRF24L01P_NG_STATE_POWER_DOWN;
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}
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void nrf24l01p_ng_transition_to_standby_1(nrf24l01p_ng_t *dev)
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{
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DEBUG_PUTS("[nrf24l01p_ng] transition to STANDBY_1");
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assert(dev->state & NRF24L01P_NG_TRANSITION_TO_STANDBY_1);
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switch (dev->state) {
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case NRF24L01P_NG_STATE_POWER_DOWN:
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gpio_clear(dev->params.pin_ce);
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uint8_t config = NRF24L01P_NG_FLG_PWR_UP;
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nrf24l01p_ng_reg8_set(dev, NRF24L01P_NG_REG_CONFIG, &config);
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xtimer_usleep(NRF24L01P_NG_DELAY_US_START_UP);
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break;
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case NRF24L01P_NG_STATE_RX_MODE:
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gpio_clear(dev->params.pin_ce);
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break;
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case NRF24L01P_NG_STATE_STANDBY_2:
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case NRF24L01P_NG_STATE_TX_MODE:
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gpio_clear(dev->params.pin_ce);
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_restore_address_p0(dev);
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/* TX finished with one packet */
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break;
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default:
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return;
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}
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dev->state = NRF24L01P_NG_STATE_STANDBY_1;
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}
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void nrf24l01p_ng_transition_to_standby_2(nrf24l01p_ng_t *dev)
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{
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DEBUG_PUTS("[nrf24l01p_ng] transition to STANDBY_2");
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assert(dev->state & NRF24L01P_NG_TRANSITION_TO_STANDBY_2);
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switch (dev->state) {
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case NRF24L01P_NG_STATE_STANDBY_1:;
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/* TX FIFO empty */
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uint8_t config = NRF24L01P_NG_FLG_PRIM_RX;
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nrf24l01p_ng_reg8_clear(dev, NRF24L01P_NG_REG_CONFIG, &config);
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gpio_set(dev->params.pin_ce);
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break;
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case NRF24L01P_NG_STATE_TX_MODE:
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gpio_set(dev->params.pin_ce);
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break;
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default:
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return;
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}
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dev->state = NRF24L01P_NG_STATE_STANDBY_2;
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}
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void nrf24l01p_ng_transition_to_rx_mode(nrf24l01p_ng_t *dev)
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{
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DEBUG_PUTS("[nrf24l01p_ng] transition to RX_MODE");
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assert(dev->state & NRF24L01P_NG_TRANSITION_TO_RX_MODE);
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if (nrf24l01p_ng_reg8_read(dev, NRF24L01P_NG_REG_FIFO_STATUS) &
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NRF24L01P_NG_FLG_RX_FULL) {
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nrf24l01p_ng_flush_rx(dev);
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}
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uint8_t config = NRF24L01P_NG_FLG_PRIM_RX;
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nrf24l01p_ng_reg8_set(dev, NRF24L01P_NG_REG_CONFIG, &config);
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gpio_set(dev->params.pin_ce);
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xtimer_usleep(NRF24L01P_NG_DELAY_US_RX_SETTLING);
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dev->state = NRF24L01P_NG_STATE_RX_MODE;
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}
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void nrf24l01p_ng_transition_to_tx_mode(nrf24l01p_ng_t *dev)
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{
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DEBUG_PUTS("[nrf24l01p_ng] transition to TX_MODE");
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assert(dev->state & NRF24L01P_NG_TRANSITION_TO_TX_MODE);
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/* TX FIFI not empty */
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uint8_t config = NRF24L01P_NG_FLG_PRIM_RX;
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nrf24l01p_ng_reg8_clear(dev, NRF24L01P_NG_REG_CONFIG, &config);
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dev->state = NRF24L01P_NG_STATE_TX_MODE;
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}
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