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5b6d56efd5
ATmega128RFA1/ATmega256RFR2 do not have a unique CPU ID. Use the RC oscillator callibration byte as an impromptu CPU ID and rely on bootlader constants present on all ATmega families for the remaining bytes. This way we can provide a faux CPU ID on all ATmega MCUs and typical hobbyists with no access to JTAG adapters or high voltage programmer capable of writing the user signature have a good chance that the CPU IDs of their device do not collide.
77 lines
1.8 KiB
C
77 lines
1.8 KiB
C
/*
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* Copyright (C) Josua Arndt, Steffen Robertz 2017 RWTH Aachen
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_atmega256rfr2
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Josua Arndt <jarndt@ias.rwth-aachen.de>
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* @author Steffen Robertz <steffen.robertz@rwth-aachen.de>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include "periph_cpu_common.h"
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#include "atmega_regs_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Available ports on the ATmega256rfr family
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* @{
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*/
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enum {
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PORT_B = 1, /**< port B */
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PORT_D = 3, /**< port D */
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PORT_E = 4, /**< port E */
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PORT_F = 5, /**< port F */
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PORT_G = 6, /**< port G */
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};
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/**
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* @brief Available external interrupt pins on the ATmega256rfr family
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*
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* In order of their interrupt number.
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*/
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#define CPU_ATMEGA_EXT_INTS { GPIO_PIN(PORT_D, 0), \
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GPIO_PIN(PORT_D, 1), \
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GPIO_PIN(PORT_D, 2), \
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GPIO_PIN(PORT_D, 3), \
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GPIO_PIN(PORT_E, 4), \
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GPIO_PIN(PORT_E, 5), \
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GPIO_PIN(PORT_E, 6), \
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GPIO_PIN(PORT_E, 7) }
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/**
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* @name Defines for the I2C interface
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* @{
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*/
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#define I2C_PORT_REG PORTD
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#define I2C_PIN_MASK (1 << PORTD1) | (1 << PORTD0)
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/** @} */
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/**
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* @name EEPROM configuration
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* @{
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*/
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#define EEPROM_SIZE (8192U) /* 8kB */
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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