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51b6379dee
The `channels` member should not be set to the number of hardware
channels *n*, but to *n* - 1 instead. The last channel is implicitly
used in `timer_read()`. Hence out of *n* hardware channels, only *n* - 1
are available to the application.
This fixes a bug introduced by 4d02e15247
which incorrectly set the channel number to *n* rather than to
*n* - 1.
92 lines
2.2 KiB
C
92 lines
2.2 KiB
C
/*
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* Copyright (C) 2018 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_common_nrf52
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* @{
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*
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* @file
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* @brief Default timer configuration for nRF52 based boards
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*
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*/
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#ifndef CFG_TIMER_DEFAULT_H
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#define CFG_TIMER_DEFAULT_H
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#include "kernel_defines.h"
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Timer configuration
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* @{
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*/
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/**
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* @brief Configuration of the exposed timers
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*
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* @warning The timer `NRF802154_TIMER`, which by default is `TIMER_DEV(1)`,
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* is used for the IEEE 802.15.4 driver
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*/
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static const timer_conf_t timer_config[] = {
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{
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.dev = NRF_TIMER1,
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.channels = 3,
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.bitmode = TIMER_BITMODE_BITMODE_32Bit,
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.irqn = TIMER1_IRQn
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},
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{
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/* BEWARE: This timer is allocated to the nRF52 IEEE 802.15.4 driver.
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* Do not use this timer (unless you do not use IEEE 802.15.4
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* networking)!
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*/
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.dev = NRF_TIMER2,
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.channels = 3,
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.bitmode = TIMER_BITMODE_BITMODE_32Bit,
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.irqn = TIMER2_IRQn
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},
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/* The later timers are only present on the larger NRF52 CPUs like NRF52840
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* or NRF52833, but not small ones like NRF52810. They do have 2 channels
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* more (CC registers [0..5] instead of CC registers [0..3]). */
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#ifdef NRF_TIMER3
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{
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.dev = NRF_TIMER3,
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.channels = 5,
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.bitmode = TIMER_BITMODE_BITMODE_32Bit,
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.irqn = TIMER3_IRQn
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},
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#endif
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#ifdef NRF_TIMER4
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{
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.dev = NRF_TIMER4,
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.channels = 5,
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.bitmode = TIMER_BITMODE_BITMODE_32Bit,
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.irqn = TIMER4_IRQn
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}
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#endif
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};
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#define TIMER_0_ISR isr_timer1
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#define TIMER_1_ISR isr_timer2
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#define TIMER_2_ISR isr_timer3
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#define TIMER_3_ISR isr_timer4
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* CFG_TIMER_DEFAULT_H */
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/** @} */
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