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76 lines
2.3 KiB
C
76 lines
2.3 KiB
C
/*
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* Copyright (C) 2016 Freie Universität Berlin
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* 2017 OTA keys S.A.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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* @brief PWM CPU specific definitions for the STM32 family
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Vincent Dupont <vincent@otakeys.com>
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*/
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#ifndef PERIPH_CPU_PWM_H
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#define PERIPH_CPU_PWM_H
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#include <stdint.h>
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#include "cpu.h"
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#include "periph/cpu_gpio.h"
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#include "periph/cpu_timer.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief PWM channel
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*
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* When using a general-purpose timer for a PWM device, the outputs OC<n> of
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* each of the four capture/compare channels can be used as PWM channel.
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* The respective capture/compare channel is then specified with 0...3 in
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* `cc_chan` for the outputs OC1...OC4.
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*
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* Advanced timers like TIM1 and TIM8 have additionally three complementary
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* outputs OC<n>N of the capture/compare channels, which can also be used
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* as PWM channels. These complementary outputs are defined with an offset
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* of 4, i.e. they are specified in `cc_chan` with 4...6 for OC1N...OC3N.
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*/
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typedef struct {
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gpio_t pin; /**< GPIO pin mapped to this channel */
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uint8_t cc_chan; /**< Capture/compare channel used: 0..3 for OC1..OC4
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or 4..6 for OC1N..OC3N for advanced timers */
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} pwm_chan_t;
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/**
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* @brief PWM configuration
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*/
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typedef struct {
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TIM_TypeDef *dev; /**< Timer used */
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uint32_t rcc_mask; /**< bit in clock enable register */
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#ifdef CPU_FAM_STM32F1
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uint32_t remap; /**< AFIO remap mask to route periph to other
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pins (or zero, if not needed) */
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#endif
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pwm_chan_t chan[TIMER_CHANNEL_NUMOF]; /**< channel mapping
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* set to {GPIO_UNDEF, 0}
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* if not used */
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gpio_af_t af; /**< alternate function used */
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uint8_t bus; /**< APB bus */
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} pwm_conf_t;
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_PWM_H */
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/** @} */
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