Kaspar Schleiser 8afaf11bb5 tests/periph_gpio: bench port 1 on z1 ... /* Port 1: * P1.0 is not assigned by default * P1.1 is the bootstrap-loader (BSL) TX pin -> input, special function, default to GND * THIS PIN MUST *NEVER* BE USED IN NORMAL EXECUTION, SINCE IT INTERFERES WITH UART0 !!! * P1.2 receives the FIFOP interrupt from CC2420 -> input, GPIO, default to GND * P1.3 receives the FIFO/GIO0 interrupt from CC2420 -> input, GPIO, default to GND * P1.4 receives the CCA/GIO1 signal from CC2420 -> input, GPIO, default to GND * P1.5 is wired to Vcc -> input, GPIO, default to Vcc * P1.6 receives interrupt INT1 from accelerometer -> input, GPIO, default to GND * P1.7 receives interrupt INT2 from accelerometer -> input, GPIO, default to GND */ (test starts indexing at 0)		2020-08-05 14:32:58 +02:00
..
tests	tests/periph_gpio: reduce benchmark iterations	2020-07-29 12:05:21 +02:00
main.c	tests/periph_gpio: reduce benchmark iterations	2020-07-29 12:05:21 +02:00
Makefile	tests/periph_gpio: bench port 1 on z1	2020-08-05 14:32:58 +02:00
Makefile.ci	tests: add stm32f030f4-demo to Makefile.ci	2019-10-21 15:33:11 +02:00