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https://github.com/RIOT-OS/RIOT.git
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165 lines
5.2 KiB
C
165 lines
5.2 KiB
C
/*
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* Copyright (C) 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_nucleo-f091
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the nucleo-f091 board
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef PERIPH_CONF_H_
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#define PERIPH_CONF_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock system configuration
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* @{
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*/
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#define CLOCK_HSE (8000000U) /* external oscillator */
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#define CLOCK_CORECLOCK (48000000U) /* desired core clock frequency */
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/* the actual PLL values are automatically generated */
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#define CLOCK_PLL_MUL (CLOCK_CORECLOCK / CLOCK_HSE)
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/** @} */
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/**
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* @brief Timer configuration
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* @{
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*/
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#define TIMER_NUMOF (1U)
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#define TIMER_0_EN 1
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#define TIMER_IRQ_PRIO 1
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/* Timer 0 configuration */
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#define TIMER_0_DEV TIM2
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#define TIMER_0_CHANNELS 4
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#define TIMER_0_PRESCALER (47U)
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#define TIMER_0_MAX_VALUE (0xffffffff)
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#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
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#define TIMER_0_IRQ_CHAN TIM2_IRQn
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#define TIMER_0_ISR isr_tim2
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/** @} */
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/**
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* @brief UART configuration
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* @}
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*/
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#define UART_NUMOF (2U)
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#define UART_0_EN 1
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#define UART_1_EN 1
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#define UART_IRQ_PRIO 1
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/* UART 0 device configuration */
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#define UART_0_DEV USART2
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#define UART_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART2EN)
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#define UART_0_CLKDIS() (RCC->APB1ENR &= (~RCC_APB1ENR_USART2EN))
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#define UART_0_IRQ USART2_IRQn
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#define UART_0_ISR isr_usart2
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/* UART 0 pin configuration */
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#define UART_0_PORT GPIOA
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#define UART_0_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN)
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#define UART_0_RX_PIN 3
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#define UART_0_TX_PIN 2
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#define UART_0_AF 1
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/* UART 1 device configuration */
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#define UART_1_DEV USART1
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#define UART_1_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_USART1EN)
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#define UART_1_CLKDIS() (RCC->APB2ENR &= (~RCC_APB2ENR_USART1EN))
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#define UART_1_IRQ USART1_IRQn
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#define UART_1_ISR isr_usart1
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/* UART 1 pin configuration */
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#define UART_1_PORT GPIOB
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#define UART_1_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOBEN)
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#define UART_1_RX_PIN 7
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#define UART_1_TX_PIN 6
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#define UART_1_AF 0
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/** @} */
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/**
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* @name GPIO configuration
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* @{
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*/
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#define GPIO_0_EN 1
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#define GPIO_1_EN 1
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#define GPIO_2_EN 1
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#define GPIO_3_EN 1
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#define GPIO_4_EN 1
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#define GPIO_5_EN 1
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#define GPIO_IRQ_PRIO 1
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/* IRQ config */
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#define GPIO_IRQ_0 -1 /* not configured */
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#define GPIO_IRQ_1 -1 /* not configured */
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#define GPIO_IRQ_2 -1 /* not configured */
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#define GPIO_IRQ_3 -1 /* not configured */
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#define GPIO_IRQ_4 -1 /* not configured */
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#define GPIO_IRQ_5 -1 /* not configured */
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#define GPIO_IRQ_6 -1 /* not configured */
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#define GPIO_IRQ_7 -1 /* not configured */
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#define GPIO_IRQ_8 -1 /* not configured */
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#define GPIO_IRQ_9 -1 /* not configured */
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#define GPIO_IRQ_10 GPIO_0
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#define GPIO_IRQ_11 GPIO_1
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#define GPIO_IRQ_12 GPIO_2
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#define GPIO_IRQ_13 GPIO_3
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#define GPIO_IRQ_14 GPIO_4
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#define GPIO_IRQ_15 GPIO_5
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/* GPIO channel 0 config */
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#define GPIO_0_PORT GPIOC
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#define GPIO_0_PIN 10
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#define GPIO_0_CLK 19
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#define GPIO_0_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI10_PC)
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#define GPIO_0_IRQ EXTI4_15_IRQn
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/* GPIO channel 1 config */
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#define GPIO_1_PORT GPIOC
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#define GPIO_1_PIN 11
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#define GPIO_1_CLK 19
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#define GPIO_1_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI11_PC)
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#define GPIO_1_IRQ EXTI4_15_IRQn
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/* GPIO channel 2 config */
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#define GPIO_2_PORT GPIOC
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#define GPIO_2_PIN 12
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#define GPIO_2_CLK 19
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#define GPIO_2_EXTI_CFG() (SYSCFG->EXTICR[3] |= SYSCFG_EXTICR4_EXTI12_PC)
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#define GPIO_2_IRQ EXTI4_15_IRQn
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/* GPIO channel 3 config */
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#define GPIO_3_PORT GPIOC
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#define GPIO_3_PIN 13 /* Used for user button 1 */
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#define GPIO_3_CLK 19
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#define GPIO_3_EXTI_CFG() (SYSCFG->EXTICR[3] |= SYSCFG_EXTICR4_EXTI13_PC)
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#define GPIO_3_IRQ EXTI4_15_IRQn
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/* GPIO channel 4 config */
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#define GPIO_4_PORT GPIOC
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#define GPIO_4_PIN 14
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#define GPIO_4_CLK 19
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#define GPIO_4_EXTI_CFG() (SYSCFG->EXTICR[3] |= SYSCFG_EXTICR4_EXTI14_PC)
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#define GPIO_4_IRQ EXTI4_15_IRQn
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/* GPIO channel 5 config */
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#define GPIO_5_PORT GPIOC
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#define GPIO_5_PIN 15
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#define GPIO_5_CLK 19
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#define GPIO_5_EXTI_CFG() (SYSCFG->EXTICR[3] |= SYSCFG_EXTICR4_EXTI15_PC)
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#define GPIO_5_IRQ EXTI4_15_IRQn
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H_ */
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/** @} */
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