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80 lines
1.7 KiB
C
80 lines
1.7 KiB
C
/*
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* Copyright (C) 2018 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_common_nrf52
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* @{
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*
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* @file
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* @brief Default timer configuration for nRF52 based boards
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*
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*/
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#ifndef CFG_TIMER_DEFAULT_H
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#define CFG_TIMER_DEFAULT_H
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Timer configuration
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* @{
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*/
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static const timer_conf_t timer_config[] = {
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{
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.dev = NRF_TIMER1,
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.channels = 3,
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.bitmode = TIMER_BITMODE_BITMODE_32Bit,
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.irqn = TIMER1_IRQn
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},
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{
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.dev = NRF_TIMER2,
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.channels = 3,
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.bitmode = TIMER_BITMODE_BITMODE_08Bit,
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.irqn = TIMER2_IRQn
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},
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/* The later timers are only present on the larger NRF52 CPUs like NRF52840
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* or NRF52833, but not small ones like NRF52810 */
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#ifdef NRF_TIMER3
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{
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.dev = NRF_TIMER3,
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.channels = 3,
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.bitmode = TIMER_BITMODE_BITMODE_08Bit,
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.irqn = TIMER3_IRQn
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},
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#endif
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#ifdef NRF_TIMER4
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{
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.dev = NRF_TIMER4,
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.channels = 3,
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.bitmode = TIMER_BITMODE_BITMODE_08Bit,
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.irqn = TIMER4_IRQn
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}
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#endif
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};
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#define TIMER_0_ISR isr_timer1
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#define TIMER_1_ISR isr_timer2
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#define TIMER_2_ISR isr_timer3
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#define TIMER_3_ISR isr_timer4
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* CFG_TIMER_DEFAULT_H */
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/** @} */
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