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https://github.com/RIOT-OS/RIOT.git
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ee832148b3
Initialize STM32 RDP in a glitch-resistant fashion to prevent debugger use when restrictions are set by the designer.
80 lines
1.8 KiB
C
80 lines
1.8 KiB
C
/*
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* Copyright (C) 2015-2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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* @brief STM32F3 CPU specific definitions for internal peripheral handling
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef PERIPH_F3_PERIPH_CPU_H
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#define PERIPH_F3_PERIPH_CPU_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Available number of ADC devices
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*/
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#if defined(ADC4)
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#define ADC_DEVS (4U)
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#elif defined(ADC3)
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#define ADC_DEVS (3U)
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#elif defined(ADC2)
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#define ADC_DEVS (2U)
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#elif defined(ADC1)
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#define ADC_DEVS (1U)
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#endif
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/**
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* @brief ADC voltage regulator start-up time [us]
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*/
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#define ADC_T_ADCVREG_STUP_US (10)
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#ifndef DOXYGEN
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/**
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* @brief Starting address of the ROM bootloader
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* see application note AN2606
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*/
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#define STM32_BOOTLOADER_ADDR (0x1FFFD800)
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/**
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* @brief Readout Protection (RDP) option bytes
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*/
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#define STM32_OPTION_BYTES ((uint32_t*) 0x1FFFF800)
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#define GET_RDP(x) (x & 0xFF)
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/**
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* @brief Override ADC resolution values
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* @{
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*/
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = (ADC_CFGR_RES), /**< ADC resolution: 6 bit */
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ADC_RES_8BIT = (ADC_CFGR_RES_1), /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = (ADC_CFGR_RES_0), /**< ADC resolution: 10 bit */
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ADC_RES_12BIT = (0x0), /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = (0x1), /**< not applicable */
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ADC_RES_16BIT = (0x2) /**< not applicable */
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} adc_res_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_F3_PERIPH_CPU_H */
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/** @} */
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