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RIOT/cpu/saml1x/include/periph_cpu.h
Benjamin Valentin fd9a247200 cpu/sam0_common: use generic exti_config
Creating an `exti_config` array for a new MCU manually is tedious and error prone.
Luckiely all information is already availiable in the vendor files.

Credit for this discovery & method goes to @Sizurka

The file was generated with

```C

int main(void) {
        puts("static const int8_t exti_config[PORT_GROUPS][32] = {");

        for (unsigned port = 1; port < 5; ++port) {
                printf("#if PORT_GROUPS >= %d\n{\n", port);
                for (unsigned pin = 0; pin < 32; ++pin) {
                        printf("#ifdef PIN_P%c%02uA_EIC_EXTINT_NUM\n", '@' + port, pin);
                        printf("    PIN_P%c%02uA_EIC_EXTINT_NUM,\n", '@' + port, pin);
                        printf("#else\n    -1,\n#endif\n");
                }
                printf("},\n#endif\n\n");
        }

        puts("};");

        return 0;
}
```

No changes in generated code are expected, but this makes adding new members
of the sam0 CPU families much easier.
2020-02-20 11:23:51 +01:00

64 lines
1.6 KiB
C

/*
* Copyright (C) 2018 Mesotic SAS
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_saml1x
* @brief CPU specific definitions for internal peripheral handling
* @{
*
* @file
* @brief CPU specific definitions for internal peripheral handling
*
* @author Dylan Laduranty <dylan.laduranty@mesotic.com>
*/
#ifndef PERIPH_CPU_H
#define PERIPH_CPU_H
#include "periph_cpu_common.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Override the default initial PM blocker
* @todo Idle modes are enabled by default, deep sleep mode blocked
*/
#define PM_BLOCKER_INITIAL 0x00000001
/**
* @name SAML1x GCLK definitions
* @{
*/
enum {
SAM0_GCLK_MAIN = 0, /**< 16 MHz main clock */
SAM0_GCLK_32KHZ, /**< 32 kHz clock */
};
/** @} */
#ifndef DOXYGEN
#define HAVE_ADC_RES_T
typedef enum {
ADC_RES_6BIT = 0xff, /**< not supported */
ADC_RES_8BIT = ADC_CTRLC_RESSEL_8BIT, /**< ADC resolution: 8 bit */
ADC_RES_10BIT = ADC_CTRLC_RESSEL_10BIT, /**< ADC resolution: 10 bit */
ADC_RES_12BIT = ADC_CTRLC_RESSEL_12BIT, /**< ADC resolution: 12 bit */
ADC_RES_14BIT = 0xfe, /**< not supported */
ADC_RES_16BIT = 0xfd /**< not supported */
} adc_res_t;
#endif /* ndef DOXYGEN */
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_CPU_H */
/** @} */